stm32_isr.c 6.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255
  1. /*
  2. ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
  3. Licensed under the Apache License, Version 2.0 (the "License");
  4. you may not use this file except in compliance with the License.
  5. You may obtain a copy of the License at
  6. http://www.apache.org/licenses/LICENSE-2.0
  7. Unless required by applicable law or agreed to in writing, software
  8. distributed under the License is distributed on an "AS IS" BASIS,
  9. WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  10. See the License for the specific language governing permissions and
  11. limitations under the License.
  12. */
  13. /**
  14. * @file STM32H7xx/stm32_isr.h
  15. * @brief STM32H7xx ISR handler code.
  16. *
  17. * @addtogroup STM32H7xx_ISR
  18. * @{
  19. */
  20. #include "hal.h"
  21. /*===========================================================================*/
  22. /* Driver local definitions. */
  23. /*===========================================================================*/
  24. /*===========================================================================*/
  25. /* Driver exported variables. */
  26. /*===========================================================================*/
  27. /*===========================================================================*/
  28. /* Driver local variables. */
  29. /*===========================================================================*/
  30. /*===========================================================================*/
  31. /* Driver local functions. */
  32. /*===========================================================================*/
  33. #define exti_serve_irq(pr, channel) { \
  34. \
  35. if ((pr) & (1U << (channel))) { \
  36. _pal_isr_code(channel); \
  37. } \
  38. }
  39. /*===========================================================================*/
  40. /* Driver interrupt handlers. */
  41. /*===========================================================================*/
  42. #if (HAL_USE_PAL && (PAL_USE_WAIT || PAL_USE_CALLBACKS)) || defined(__DOXYGEN__)
  43. #if !defined(STM32_DISABLE_EXTI0_HANDLER)
  44. /**
  45. * @brief EXTI[0] interrupt handler.
  46. *
  47. * @isr
  48. */
  49. OSAL_IRQ_HANDLER(Vector58) {
  50. uint32_t pr;
  51. OSAL_IRQ_PROLOGUE();
  52. pr = EXTI_D1->PR1;
  53. pr &= EXTI_D1->IMR1 & (1U << 0);
  54. EXTI_D1->PR1 = pr;
  55. exti_serve_irq(pr, 0);
  56. OSAL_IRQ_EPILOGUE();
  57. }
  58. #endif
  59. #if !defined(STM32_DISABLE_EXTI1_HANDLER)
  60. /**
  61. * @brief EXTI[1] interrupt handler.
  62. *
  63. * @isr
  64. */
  65. OSAL_IRQ_HANDLER(Vector5C) {
  66. uint32_t pr;
  67. OSAL_IRQ_PROLOGUE();
  68. pr = EXTI_D1->PR1;
  69. pr &= EXTI_D1->IMR1 & (1U << 1);
  70. EXTI_D1->PR1 = pr;
  71. exti_serve_irq(pr, 1);
  72. OSAL_IRQ_EPILOGUE();
  73. }
  74. #endif
  75. #if !defined(STM32_DISABLE_EXTI2_HANDLER)
  76. /**
  77. * @brief EXTI[2] interrupt handler.
  78. *
  79. * @isr
  80. */
  81. OSAL_IRQ_HANDLER(Vector60) {
  82. uint32_t pr;
  83. OSAL_IRQ_PROLOGUE();
  84. pr = EXTI_D1->PR1;
  85. pr &= EXTI_D1->IMR1 & (1U << 2);
  86. EXTI_D1->PR1 = pr;
  87. exti_serve_irq(pr, 2);
  88. OSAL_IRQ_EPILOGUE();
  89. }
  90. #endif
  91. #if !defined(STM32_DISABLE_EXTI3_HANDLER)
  92. /**
  93. * @brief EXTI[3] interrupt handler.
  94. *
  95. * @isr
  96. */
  97. OSAL_IRQ_HANDLER(Vector64) {
  98. uint32_t pr;
  99. OSAL_IRQ_PROLOGUE();
  100. pr = EXTI_D1->PR1;
  101. pr &= EXTI_D1->IMR1 & (1U << 3);
  102. EXTI_D1->PR1 = pr;
  103. exti_serve_irq(pr, 3);
  104. OSAL_IRQ_EPILOGUE();
  105. }
  106. #endif
  107. #if !defined(STM32_DISABLE_EXTI4_HANDLER)
  108. /**
  109. * @brief EXTI[4] interrupt handler.
  110. *
  111. * @isr
  112. */
  113. OSAL_IRQ_HANDLER(Vector68) {
  114. uint32_t pr;
  115. OSAL_IRQ_PROLOGUE();
  116. pr = EXTI_D1->PR1;
  117. pr &= EXTI_D1->IMR1 & (1U << 4);
  118. EXTI_D1->PR1 = pr;
  119. exti_serve_irq(pr, 4);
  120. OSAL_IRQ_EPILOGUE();
  121. }
  122. #endif
  123. #if !defined(STM32_DISABLE_EXTI5_9_HANDLER)
  124. /**
  125. * @brief EXTI[5]...EXTI[9] interrupt handler.
  126. *
  127. * @isr
  128. */
  129. OSAL_IRQ_HANDLER(Vector9C) {
  130. uint32_t pr;
  131. OSAL_IRQ_PROLOGUE();
  132. pr = EXTI_D1->PR1;
  133. pr &= EXTI_D1->IMR1 & ((1U << 5) | (1U << 6) | (1U << 7) | (1U << 8) |
  134. (1U << 9));
  135. EXTI_D1->PR1 = pr;
  136. exti_serve_irq(pr, 5);
  137. exti_serve_irq(pr, 6);
  138. exti_serve_irq(pr, 7);
  139. exti_serve_irq(pr, 8);
  140. exti_serve_irq(pr, 9);
  141. OSAL_IRQ_EPILOGUE();
  142. }
  143. #endif
  144. #if !defined(STM32_DISABLE_EXTI10_15_HANDLER)
  145. /**
  146. * @brief EXTI[10]...EXTI[15] interrupt handler.
  147. *
  148. * @isr
  149. */
  150. OSAL_IRQ_HANDLER(VectorE0) {
  151. uint32_t pr;
  152. OSAL_IRQ_PROLOGUE();
  153. pr = EXTI_D1->PR1;
  154. pr &= EXTI_D1->IMR1 & ((1U << 10) | (1U << 11) | (1U << 12) | (1U << 13) |
  155. (1U << 14) | (1U << 15));
  156. EXTI_D1->PR1 = pr;
  157. exti_serve_irq(pr, 10);
  158. exti_serve_irq(pr, 11);
  159. exti_serve_irq(pr, 12);
  160. exti_serve_irq(pr, 13);
  161. exti_serve_irq(pr, 14);
  162. exti_serve_irq(pr, 15);
  163. OSAL_IRQ_EPILOGUE();
  164. }
  165. #endif
  166. #endif /* HAL_USE_PAL && (PAL_USE_WAIT || PAL_USE_CALLBACKS) */
  167. /*===========================================================================*/
  168. /* Driver exported functions. */
  169. /*===========================================================================*/
  170. /**
  171. * @brief Enables IRQ sources.
  172. *
  173. * @notapi
  174. */
  175. void irqInit(void) {
  176. #if HAL_USE_PAL
  177. nvicEnableVector(EXTI0_IRQn, STM32_IRQ_EXTI0_PRIORITY);
  178. nvicEnableVector(EXTI1_IRQn, STM32_IRQ_EXTI1_PRIORITY);
  179. nvicEnableVector(EXTI2_IRQn, STM32_IRQ_EXTI2_PRIORITY);
  180. nvicEnableVector(EXTI3_IRQn, STM32_IRQ_EXTI3_PRIORITY);
  181. nvicEnableVector(EXTI4_IRQn, STM32_IRQ_EXTI4_PRIORITY);
  182. nvicEnableVector(EXTI9_5_IRQn, STM32_IRQ_EXTI5_9_PRIORITY);
  183. nvicEnableVector(EXTI15_10_IRQn, STM32_IRQ_EXTI10_15_PRIORITY);
  184. #endif
  185. }
  186. /**
  187. * @brief Disables IRQ sources.
  188. *
  189. * @notapi
  190. */
  191. void irqDeinit(void) {
  192. #if HAL_USE_PAL
  193. nvicDisableVector(EXTI0_IRQn);
  194. nvicDisableVector(EXTI1_IRQn);
  195. nvicDisableVector(EXTI2_IRQn);
  196. nvicDisableVector(EXTI3_IRQn);
  197. nvicDisableVector(EXTI4_IRQn);
  198. nvicDisableVector(EXTI9_5_IRQn);
  199. nvicDisableVector(EXTI15_10_IRQn);
  200. #endif
  201. }
  202. /** @} */