main.c 5.0 KB

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  1. /*
  2. ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
  3. Licensed under the Apache License, Version 2.0 (the "License");
  4. you may not use this file except in compliance with the License.
  5. You may obtain a copy of the License at
  6. http://www.apache.org/licenses/LICENSE-2.0
  7. Unless required by applicable law or agreed to in writing, software
  8. distributed under the License is distributed on an "AS IS" BASIS,
  9. WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  10. See the License for the specific language governing permissions and
  11. limitations under the License.
  12. */
  13. #include <string.h>
  14. #include "ch.h"
  15. #include "hal.h"
  16. /*===========================================================================*/
  17. /* SPI driver related. */
  18. /*===========================================================================*/
  19. #define SPI_LOOPBACK
  20. /*
  21. * Maximum speed SPI configuration (27MHz, CPHA=0, CPOL=0, MSb first).
  22. */
  23. static const SPIConfig hs_spicfg = {
  24. false,
  25. NULL,
  26. GPIOB,
  27. GPIOB_ARD_D15,
  28. SPI_CR1_CPOL | SPI_CR1_BR_0,
  29. SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0
  30. };
  31. /*
  32. * Low speed SPI configuration (421.875kHz, CPHA=0, CPOL=0, MSb first).
  33. */
  34. static const SPIConfig ls_spicfg = {
  35. false,
  36. NULL,
  37. GPIOB,
  38. GPIOB_ARD_D14,
  39. SPI_CR1_BR_2 | SPI_CR1_BR_1,
  40. SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0
  41. };
  42. /*
  43. * SPI TX and RX buffers.
  44. * Note, the buffer are aligned to a 32 bytes boundary because limitations
  45. * imposed by the data cache. Note, this is GNU specific, it must be
  46. * handled differently for other compilers.
  47. */
  48. #define SPI_BUFFERS_SIZE 128U
  49. static uint8_t txbuf[SPI_BUFFERS_SIZE];
  50. static uint8_t rxbuf[SPI_BUFFERS_SIZE];
  51. /*===========================================================================*/
  52. /* Application code. */
  53. /*===========================================================================*/
  54. /*
  55. * SPI bus contender 1.
  56. */
  57. static THD_WORKING_AREA(spi_thread_1_wa, 256);
  58. static THD_FUNCTION(spi_thread_1, p) {
  59. (void)p;
  60. chRegSetThreadName("SPI thread 1");
  61. while (true) {
  62. unsigned i;
  63. /* Bush acquisition and SPI reprogramming.*/
  64. spiAcquireBus(&SPID2);
  65. spiStart(&SPID2, &hs_spicfg);
  66. /* Preparing data buffer and flushing cache.*/
  67. for (i = 0; i < SPI_BUFFERS_SIZE; i++)
  68. txbuf[i] = (uint8_t)i;
  69. /* Slave selection and data exchange.*/
  70. spiSelect(&SPID2);
  71. spiExchange(&SPID2, SPI_BUFFERS_SIZE, txbuf, rxbuf);
  72. spiUnselect(&SPID2);
  73. #if defined(SPI_LOOPBACK)
  74. if (memcmp(txbuf, rxbuf, SPI_BUFFERS_SIZE) != 0)
  75. chSysHalt("loopback failure");
  76. #endif
  77. /* Releasing the bus.*/
  78. spiReleaseBus(&SPID2);
  79. }
  80. }
  81. /*
  82. * SPI bus contender 2.
  83. */
  84. static THD_WORKING_AREA(spi_thread_2_wa, 256);
  85. static THD_FUNCTION(spi_thread_2, p) {
  86. (void)p;
  87. chRegSetThreadName("SPI thread 2");
  88. while (true) {
  89. unsigned i;
  90. /* Bush acquisition and SPI reprogramming.*/
  91. spiAcquireBus(&SPID2);
  92. spiStart(&SPID2, &ls_spicfg);
  93. /* Preparing data buffer and flushing cache.*/
  94. for (i = 0; i < SPI_BUFFERS_SIZE; i++)
  95. txbuf[i] = (uint8_t)(128U + i);
  96. /* Slave selection and data exchange.*/
  97. spiSelect(&SPID2);
  98. spiExchange(&SPID2, SPI_BUFFERS_SIZE, txbuf, rxbuf);
  99. spiUnselect(&SPID2);
  100. #if defined(SPI_LOOPBACK)
  101. if (memcmp(txbuf, rxbuf, SPI_BUFFERS_SIZE) != 0)
  102. chSysHalt("loopback failure");
  103. #endif
  104. /* Releasing the bus.*/
  105. spiReleaseBus(&SPID2);
  106. }
  107. }
  108. /*
  109. * Application entry point.
  110. */
  111. int main(void) {
  112. /*
  113. * System initializations.
  114. * - HAL initialization, this also initializes the configured device drivers
  115. * and performs the board-specific initializations.
  116. * - Kernel initialization, the main() function becomes a thread and the
  117. * RTOS is active.
  118. */
  119. halInit();
  120. chSysInit();
  121. /*
  122. * SPI2 I/O pins setup.
  123. */
  124. palSetLineMode(LINE_ARD_D13,
  125. PAL_MODE_ALTERNATE(5) |
  126. PAL_STM32_OSPEED_HIGHEST); /* SPI SCK. */
  127. palSetLineMode(LINE_ARD_D12,
  128. PAL_MODE_ALTERNATE(5) |
  129. PAL_STM32_OSPEED_HIGHEST); /* MISO. */
  130. palSetLineMode(LINE_ARD_D11,
  131. PAL_MODE_ALTERNATE(5) |
  132. PAL_STM32_OSPEED_HIGHEST); /* MOSI. */
  133. palSetLine(LINE_ARD_D15);
  134. palSetLineMode(LINE_ARD_D15,
  135. PAL_MODE_OUTPUT_PUSHPULL); /* CS0. */
  136. palSetLine(LINE_ARD_D14);
  137. palSetLineMode(LINE_ARD_D14,
  138. PAL_MODE_OUTPUT_PUSHPULL); /* CS1. */
  139. /*
  140. * Starting the transmitter and receiver threads.
  141. */
  142. chThdCreateStatic(spi_thread_1_wa, sizeof(spi_thread_1_wa),
  143. NORMALPRIO + 1, spi_thread_1, NULL);
  144. chThdCreateStatic(spi_thread_2_wa, sizeof(spi_thread_2_wa),
  145. NORMALPRIO + 1, spi_thread_2, NULL);
  146. /*
  147. * Normal main() thread activity, in this demo it does nothing.
  148. */
  149. while (true) {
  150. chThdSleepMilliseconds(500);
  151. }
  152. }