startup_stm32f40_41xxx.s 28 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434
  1. ;******************** (C) COPYRIGHT 2014 STMicroelectronics ********************
  2. ;* File Name : startup_stm32f40_41xxx.s
  3. ;* Author : MCD Application Team
  4. ;* @version : V1.4.0
  5. ;* @date : 04-August-2014
  6. ;* Description : STM32F40xxx/41xxx devices vector table for MDK-ARM toolchain.
  7. ;* This module performs:
  8. ;* - Set the initial SP
  9. ;* - Set the initial PC == Reset_Handler
  10. ;* - Set the vector table entries with the exceptions ISR address
  11. ;* - Configure the system clock and the external SRAM mounted on
  12. ;* STM324xG-EVAL board to be used as data memory (optional,
  13. ;* to be enabled by user)
  14. ;* - Branches to __main in the C library (which eventually
  15. ;* calls main()).
  16. ;* After Reset the CortexM4 processor is in Thread mode,
  17. ;* priority is Privileged, and the Stack is set to Main.
  18. ;* <<< Use Configuration Wizard in Context Menu >>>
  19. ;*******************************************************************************
  20. ;
  21. ; Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  22. ; You may not use this file except in compliance with the License.
  23. ; You may obtain a copy of the License at:
  24. ;
  25. ; http://www.st.com/software_license_agreement_liberty_v2
  26. ;
  27. ; Unless required by applicable law or agreed to in writing, software
  28. ; distributed under the License is distributed on an "AS IS" BASIS,
  29. ; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  30. ; See the License for the specific language governing permissions and
  31. ; limitations under the License.
  32. ;
  33. ;*******************************************************************************
  34. ; Amount of memory (in bytes) allocated for Stack
  35. ; Tailor this value to your application needs
  36. ; <h> Stack Configuration
  37. ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
  38. ; </h>
  39. Stack_Size EQU 0x00000400
  40. AREA STACK, NOINIT, READWRITE, ALIGN=3
  41. Stack_Mem SPACE Stack_Size
  42. __initial_sp
  43. ; <h> Heap Configuration
  44. ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
  45. ; </h>
  46. Heap_Size EQU 0x00000200
  47. AREA HEAP, NOINIT, READWRITE, ALIGN=3
  48. __heap_base
  49. Heap_Mem SPACE Heap_Size
  50. __heap_limit
  51. PRESERVE8
  52. THUMB
  53. ; Vector Table Mapped to Address 0 at Reset
  54. AREA RESET, DATA, READONLY
  55. EXPORT __Vectors
  56. EXPORT __Vectors_End
  57. EXPORT __Vectors_Size
  58. __Vectors DCD __initial_sp ; Top of Stack
  59. DCD Reset_Handler ; Reset Handler
  60. DCD NMI_Handler ; NMI Handler
  61. DCD HardFault_Handler ; Hard Fault Handler
  62. DCD MemManage_Handler ; MPU Fault Handler
  63. DCD BusFault_Handler ; Bus Fault Handler
  64. DCD UsageFault_Handler ; Usage Fault Handler
  65. DCD 0 ; Reserved
  66. DCD 0 ; Reserved
  67. DCD 0 ; Reserved
  68. DCD 0 ; Reserved
  69. DCD SVC_Handler ; SVCall Handler
  70. DCD DebugMon_Handler ; Debug Monitor Handler
  71. DCD 0 ; Reserved
  72. DCD PendSV_Handler ; PendSV Handler
  73. DCD SysTick_Handler ; SysTick Handler
  74. ; External Interrupts
  75. DCD WWDG_IRQHandler ; Window WatchDog
  76. DCD PVD_IRQHandler ; PVD through EXTI Line detection
  77. DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
  78. DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
  79. DCD FLASH_IRQHandler ; FLASH
  80. DCD RCC_IRQHandler ; RCC
  81. DCD EXTI0_IRQHandler ; EXTI Line0
  82. DCD EXTI1_IRQHandler ; EXTI Line1
  83. DCD EXTI2_IRQHandler ; EXTI Line2
  84. DCD EXTI3_IRQHandler ; EXTI Line3
  85. DCD EXTI4_IRQHandler ; EXTI Line4
  86. DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0
  87. DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1
  88. DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2
  89. DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3
  90. DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4
  91. DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5
  92. DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6
  93. DCD ADC_IRQHandler ; ADC1, ADC2 and ADC3s
  94. DCD CAN1_TX_IRQHandler ; CAN1 TX
  95. DCD CAN1_RX0_IRQHandler ; CAN1 RX0
  96. DCD CAN1_RX1_IRQHandler ; CAN1 RX1
  97. DCD CAN1_SCE_IRQHandler ; CAN1 SCE
  98. DCD EXTI9_5_IRQHandler ; External Line[9:5]s
  99. DCD TIM1_BRK_TIM9_IRQHandler ; TIM1 Break and TIM9
  100. DCD TIM1_UP_TIM10_IRQHandler ; TIM1 Update and TIM10
  101. DCD TIM1_TRG_COM_TIM11_IRQHandler ; TIM1 Trigger and Commutation and TIM11
  102. DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
  103. DCD TIM2_IRQHandler ; TIM2
  104. DCD TIM3_IRQHandler ; TIM3
  105. DCD TIM4_IRQHandler ; TIM4
  106. DCD I2C1_EV_IRQHandler ; I2C1 Event
  107. DCD I2C1_ER_IRQHandler ; I2C1 Error
  108. DCD I2C2_EV_IRQHandler ; I2C2 Event
  109. DCD I2C2_ER_IRQHandler ; I2C2 Error
  110. DCD SPI1_IRQHandler ; SPI1
  111. DCD SPI2_IRQHandler ; SPI2
  112. DCD USART1_IRQHandler ; USART1
  113. DCD USART2_IRQHandler ; USART2
  114. DCD USART3_IRQHandler ; USART3
  115. DCD EXTI15_10_IRQHandler ; External Line[15:10]s
  116. DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
  117. DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line
  118. DCD TIM8_BRK_TIM12_IRQHandler ; TIM8 Break and TIM12
  119. DCD TIM8_UP_TIM13_IRQHandler ; TIM8 Update and TIM13
  120. DCD TIM8_TRG_COM_TIM14_IRQHandler ; TIM8 Trigger and Commutation and TIM14
  121. DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare
  122. DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7
  123. DCD FSMC_IRQHandler ; FSMC
  124. DCD SDIO_IRQHandler ; SDIO
  125. DCD TIM5_IRQHandler ; TIM5
  126. DCD SPI3_IRQHandler ; SPI3
  127. DCD UART4_IRQHandler ; UART4
  128. DCD UART5_IRQHandler ; UART5
  129. DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
  130. DCD TIM7_IRQHandler ; TIM7
  131. DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0
  132. DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1
  133. DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2
  134. DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3
  135. DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4
  136. DCD ETH_IRQHandler ; Ethernet
  137. DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line
  138. DCD CAN2_TX_IRQHandler ; CAN2 TX
  139. DCD CAN2_RX0_IRQHandler ; CAN2 RX0
  140. DCD CAN2_RX1_IRQHandler ; CAN2 RX1
  141. DCD CAN2_SCE_IRQHandler ; CAN2 SCE
  142. DCD OTG_FS_IRQHandler ; USB OTG FS
  143. DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5
  144. DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6
  145. DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7
  146. DCD USART6_IRQHandler ; USART6
  147. DCD I2C3_EV_IRQHandler ; I2C3 event
  148. DCD I2C3_ER_IRQHandler ; I2C3 error
  149. DCD OTG_HS_EP1_OUT_IRQHandler ; USB OTG HS End Point 1 Out
  150. DCD OTG_HS_EP1_IN_IRQHandler ; USB OTG HS End Point 1 In
  151. DCD OTG_HS_WKUP_IRQHandler ; USB OTG HS Wakeup through EXTI
  152. DCD OTG_HS_IRQHandler ; USB OTG HS
  153. DCD DCMI_IRQHandler ; DCMI
  154. DCD CRYP_IRQHandler ; CRYP crypto
  155. DCD HASH_RNG_IRQHandler ; Hash and Rng
  156. DCD FPU_IRQHandler ; FPU
  157. __Vectors_End
  158. __Vectors_Size EQU __Vectors_End - __Vectors
  159. AREA |.text|, CODE, READONLY
  160. ; Reset handler
  161. Reset_Handler PROC
  162. EXPORT Reset_Handler [WEAK]
  163. IMPORT SystemInit
  164. IMPORT __main
  165. LDR R0, =SystemInit
  166. BLX R0
  167. LDR R0, =__main
  168. BX R0
  169. ENDP
  170. ; Dummy Exception Handlers (infinite loops which can be modified)
  171. NMI_Handler PROC
  172. EXPORT NMI_Handler [WEAK]
  173. B .
  174. ENDP
  175. HardFault_Handler\
  176. PROC
  177. EXPORT HardFault_Handler [WEAK]
  178. B .
  179. ENDP
  180. MemManage_Handler\
  181. PROC
  182. EXPORT MemManage_Handler [WEAK]
  183. B .
  184. ENDP
  185. BusFault_Handler\
  186. PROC
  187. EXPORT BusFault_Handler [WEAK]
  188. B .
  189. ENDP
  190. UsageFault_Handler\
  191. PROC
  192. EXPORT UsageFault_Handler [WEAK]
  193. B .
  194. ENDP
  195. SVC_Handler PROC
  196. EXPORT SVC_Handler [WEAK]
  197. B .
  198. ENDP
  199. DebugMon_Handler\
  200. PROC
  201. EXPORT DebugMon_Handler [WEAK]
  202. B .
  203. ENDP
  204. PendSV_Handler PROC
  205. EXPORT PendSV_Handler [WEAK]
  206. B .
  207. ENDP
  208. SysTick_Handler PROC
  209. EXPORT SysTick_Handler [WEAK]
  210. B .
  211. ENDP
  212. Default_Handler PROC
  213. EXPORT WWDG_IRQHandler [WEAK]
  214. EXPORT PVD_IRQHandler [WEAK]
  215. EXPORT TAMP_STAMP_IRQHandler [WEAK]
  216. EXPORT RTC_WKUP_IRQHandler [WEAK]
  217. EXPORT FLASH_IRQHandler [WEAK]
  218. EXPORT RCC_IRQHandler [WEAK]
  219. EXPORT EXTI0_IRQHandler [WEAK]
  220. EXPORT EXTI1_IRQHandler [WEAK]
  221. EXPORT EXTI2_IRQHandler [WEAK]
  222. EXPORT EXTI3_IRQHandler [WEAK]
  223. EXPORT EXTI4_IRQHandler [WEAK]
  224. EXPORT DMA1_Stream0_IRQHandler [WEAK]
  225. EXPORT DMA1_Stream1_IRQHandler [WEAK]
  226. EXPORT DMA1_Stream2_IRQHandler [WEAK]
  227. EXPORT DMA1_Stream3_IRQHandler [WEAK]
  228. EXPORT DMA1_Stream4_IRQHandler [WEAK]
  229. EXPORT DMA1_Stream5_IRQHandler [WEAK]
  230. EXPORT DMA1_Stream6_IRQHandler [WEAK]
  231. EXPORT ADC_IRQHandler [WEAK]
  232. EXPORT CAN1_TX_IRQHandler [WEAK]
  233. EXPORT CAN1_RX0_IRQHandler [WEAK]
  234. EXPORT CAN1_RX1_IRQHandler [WEAK]
  235. EXPORT CAN1_SCE_IRQHandler [WEAK]
  236. EXPORT EXTI9_5_IRQHandler [WEAK]
  237. EXPORT TIM1_BRK_TIM9_IRQHandler [WEAK]
  238. EXPORT TIM1_UP_TIM10_IRQHandler [WEAK]
  239. EXPORT TIM1_TRG_COM_TIM11_IRQHandler [WEAK]
  240. EXPORT TIM1_CC_IRQHandler [WEAK]
  241. EXPORT TIM2_IRQHandler [WEAK]
  242. EXPORT TIM3_IRQHandler [WEAK]
  243. EXPORT TIM4_IRQHandler [WEAK]
  244. EXPORT I2C1_EV_IRQHandler [WEAK]
  245. EXPORT I2C1_ER_IRQHandler [WEAK]
  246. EXPORT I2C2_EV_IRQHandler [WEAK]
  247. EXPORT I2C2_ER_IRQHandler [WEAK]
  248. EXPORT SPI1_IRQHandler [WEAK]
  249. EXPORT SPI2_IRQHandler [WEAK]
  250. EXPORT USART1_IRQHandler [WEAK]
  251. EXPORT USART2_IRQHandler [WEAK]
  252. EXPORT USART3_IRQHandler [WEAK]
  253. EXPORT EXTI15_10_IRQHandler [WEAK]
  254. EXPORT RTC_Alarm_IRQHandler [WEAK]
  255. EXPORT OTG_FS_WKUP_IRQHandler [WEAK]
  256. EXPORT TIM8_BRK_TIM12_IRQHandler [WEAK]
  257. EXPORT TIM8_UP_TIM13_IRQHandler [WEAK]
  258. EXPORT TIM8_TRG_COM_TIM14_IRQHandler [WEAK]
  259. EXPORT TIM8_CC_IRQHandler [WEAK]
  260. EXPORT DMA1_Stream7_IRQHandler [WEAK]
  261. EXPORT FSMC_IRQHandler [WEAK]
  262. EXPORT SDIO_IRQHandler [WEAK]
  263. EXPORT TIM5_IRQHandler [WEAK]
  264. EXPORT SPI3_IRQHandler [WEAK]
  265. EXPORT UART4_IRQHandler [WEAK]
  266. EXPORT UART5_IRQHandler [WEAK]
  267. EXPORT TIM6_DAC_IRQHandler [WEAK]
  268. EXPORT TIM7_IRQHandler [WEAK]
  269. EXPORT DMA2_Stream0_IRQHandler [WEAK]
  270. EXPORT DMA2_Stream1_IRQHandler [WEAK]
  271. EXPORT DMA2_Stream2_IRQHandler [WEAK]
  272. EXPORT DMA2_Stream3_IRQHandler [WEAK]
  273. EXPORT DMA2_Stream4_IRQHandler [WEAK]
  274. EXPORT ETH_IRQHandler [WEAK]
  275. EXPORT ETH_WKUP_IRQHandler [WEAK]
  276. EXPORT CAN2_TX_IRQHandler [WEAK]
  277. EXPORT CAN2_RX0_IRQHandler [WEAK]
  278. EXPORT CAN2_RX1_IRQHandler [WEAK]
  279. EXPORT CAN2_SCE_IRQHandler [WEAK]
  280. EXPORT OTG_FS_IRQHandler [WEAK]
  281. EXPORT DMA2_Stream5_IRQHandler [WEAK]
  282. EXPORT DMA2_Stream6_IRQHandler [WEAK]
  283. EXPORT DMA2_Stream7_IRQHandler [WEAK]
  284. EXPORT USART6_IRQHandler [WEAK]
  285. EXPORT I2C3_EV_IRQHandler [WEAK]
  286. EXPORT I2C3_ER_IRQHandler [WEAK]
  287. EXPORT OTG_HS_EP1_OUT_IRQHandler [WEAK]
  288. EXPORT OTG_HS_EP1_IN_IRQHandler [WEAK]
  289. EXPORT OTG_HS_WKUP_IRQHandler [WEAK]
  290. EXPORT OTG_HS_IRQHandler [WEAK]
  291. EXPORT DCMI_IRQHandler [WEAK]
  292. EXPORT CRYP_IRQHandler [WEAK]
  293. EXPORT HASH_RNG_IRQHandler [WEAK]
  294. EXPORT FPU_IRQHandler [WEAK]
  295. WWDG_IRQHandler
  296. PVD_IRQHandler
  297. TAMP_STAMP_IRQHandler
  298. RTC_WKUP_IRQHandler
  299. FLASH_IRQHandler
  300. RCC_IRQHandler
  301. EXTI0_IRQHandler
  302. EXTI1_IRQHandler
  303. EXTI2_IRQHandler
  304. EXTI3_IRQHandler
  305. EXTI4_IRQHandler
  306. DMA1_Stream0_IRQHandler
  307. DMA1_Stream1_IRQHandler
  308. DMA1_Stream2_IRQHandler
  309. DMA1_Stream3_IRQHandler
  310. DMA1_Stream4_IRQHandler
  311. DMA1_Stream5_IRQHandler
  312. DMA1_Stream6_IRQHandler
  313. ADC_IRQHandler
  314. CAN1_TX_IRQHandler
  315. CAN1_RX0_IRQHandler
  316. CAN1_RX1_IRQHandler
  317. CAN1_SCE_IRQHandler
  318. EXTI9_5_IRQHandler
  319. TIM1_BRK_TIM9_IRQHandler
  320. TIM1_UP_TIM10_IRQHandler
  321. TIM1_TRG_COM_TIM11_IRQHandler
  322. TIM1_CC_IRQHandler
  323. TIM2_IRQHandler
  324. TIM3_IRQHandler
  325. TIM4_IRQHandler
  326. I2C1_EV_IRQHandler
  327. I2C1_ER_IRQHandler
  328. I2C2_EV_IRQHandler
  329. I2C2_ER_IRQHandler
  330. SPI1_IRQHandler
  331. SPI2_IRQHandler
  332. USART1_IRQHandler
  333. USART2_IRQHandler
  334. USART3_IRQHandler
  335. EXTI15_10_IRQHandler
  336. RTC_Alarm_IRQHandler
  337. OTG_FS_WKUP_IRQHandler
  338. TIM8_BRK_TIM12_IRQHandler
  339. TIM8_UP_TIM13_IRQHandler
  340. TIM8_TRG_COM_TIM14_IRQHandler
  341. TIM8_CC_IRQHandler
  342. DMA1_Stream7_IRQHandler
  343. FSMC_IRQHandler
  344. SDIO_IRQHandler
  345. TIM5_IRQHandler
  346. SPI3_IRQHandler
  347. UART4_IRQHandler
  348. UART5_IRQHandler
  349. TIM6_DAC_IRQHandler
  350. TIM7_IRQHandler
  351. DMA2_Stream0_IRQHandler
  352. DMA2_Stream1_IRQHandler
  353. DMA2_Stream2_IRQHandler
  354. DMA2_Stream3_IRQHandler
  355. DMA2_Stream4_IRQHandler
  356. ETH_IRQHandler
  357. ETH_WKUP_IRQHandler
  358. CAN2_TX_IRQHandler
  359. CAN2_RX0_IRQHandler
  360. CAN2_RX1_IRQHandler
  361. CAN2_SCE_IRQHandler
  362. OTG_FS_IRQHandler
  363. DMA2_Stream5_IRQHandler
  364. DMA2_Stream6_IRQHandler
  365. DMA2_Stream7_IRQHandler
  366. USART6_IRQHandler
  367. I2C3_EV_IRQHandler
  368. I2C3_ER_IRQHandler
  369. OTG_HS_EP1_OUT_IRQHandler
  370. OTG_HS_EP1_IN_IRQHandler
  371. OTG_HS_WKUP_IRQHandler
  372. OTG_HS_IRQHandler
  373. DCMI_IRQHandler
  374. CRYP_IRQHandler
  375. HASH_RNG_IRQHandler
  376. FPU_IRQHandler
  377. B .
  378. ENDP
  379. ALIGN
  380. ;*******************************************************************************
  381. ; User Stack and Heap initialization
  382. ;*******************************************************************************
  383. IF :DEF:__MICROLIB
  384. EXPORT __initial_sp
  385. EXPORT __heap_base
  386. EXPORT __heap_limit
  387. ELSE
  388. IMPORT __use_two_region_memory
  389. EXPORT __user_initial_stackheap
  390. __user_initial_stackheap
  391. LDR R0, = Heap_Mem
  392. LDR R1, =(Stack_Mem + Stack_Size)
  393. LDR R2, = (Heap_Mem + Heap_Size)
  394. LDR R3, = Stack_Mem
  395. BX LR
  396. ALIGN
  397. ENDIF
  398. END
  399. ;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****