STM32F405xx.py 17 KB

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  1. #!/usr/bin/env python
  2. '''
  3. these tables are generated from the STM32 datasheets for the
  4. STM32F40x
  5. '''
  6. # additional build information for ChibiOS
  7. build = {
  8. "CHIBIOS_STARTUP_MK" : "os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk",
  9. "CHIBIOS_PLATFORM_MK" : "os/hal/ports/STM32/STM32F4xx/platform.mk"
  10. }
  11. # MCU parameters
  12. mcu = {
  13. # location of MCU serial number
  14. 'UDID_START' : 0x1FFF7A10,
  15. # ram map, as list of (address, size-kb, flags)
  16. # flags of 1 means DMA-capable
  17. # flags of 2 means faster memory for CPU intensive work
  18. 'RAM_MAP' : [
  19. (0x20000000, 128, 1), # main memory, DMA safe
  20. (0x10000000, 64, 2), # CCM memory, faster, but not DMA safe
  21. ]
  22. }
  23. AltFunction_map = {
  24. # format is PIN:FUNCTION : AFNUM
  25. # extracted from tabula-AF-F405.csv
  26. "PA0:ETH_MII_CRS" : 11,
  27. "PA0:EVENTOUT" : 15,
  28. "PA0:TIM2_CH1" : 1,
  29. "PA0:TIM2_ETR" : 1,
  30. "PA0:TIM5_CH1" : 2,
  31. "PA0:TIM8_ETR" : 3,
  32. "PA0:UART4_TX" : 8,
  33. "PA0:USART2_CTS" : 7,
  34. "PA10:DCMI_D1" : 13,
  35. "PA10:EVENTOUT" : 15,
  36. "PA10:OTG_FS_ID" : 10,
  37. "PA10:TIM1_CH3" : 1,
  38. "PA10:USART1_RX" : 7,
  39. "PA11:CAN1_RX" : 9,
  40. "PA11:EVENTOUT" : 15,
  41. "PA11:OTG_FS_DM" : 10,
  42. "PA11:TIM1_CH4" : 1,
  43. "PA11:USART1_CTS" : 7,
  44. "PA12:CAN1_TX" : 9,
  45. "PA12:EVENTOUT" : 15,
  46. "PA12:OTG_FS_DP" : 10,
  47. "PA12:TIM1_ETR" : 1,
  48. "PA12:USART1_RTS" : 7,
  49. "PA13:EVENTOUT" : 15,
  50. "PA13:JTMS-SWDIO" : 0,
  51. "PA14:EVENTOUT" : 15,
  52. "PA14:JTCK-SWCLK" : 0,
  53. "PA15:EVENTOUT" : 15,
  54. "PA15:JTDI" : 0,
  55. "PA15:SPI1_NSS" : 5,
  56. "PA15:SPI3_NSS" : 6,
  57. "PA15:TIM2_CH1" : 1,
  58. "PA15:TIM2_ETR" : 1,
  59. "PA1:ETH_MII_RX_CLK" : 11,
  60. "PA1:ETH_RMII__REF_CLK" : 11,
  61. "PA1:EVENTOUT" : 15,
  62. "PA1:TIM2_CH2" : 1,
  63. "PA1:TIM5_CH2" : 2,
  64. "PA1:UART4_RX" : 8,
  65. "PA1:USART2_RTS" : 7,
  66. "PA2:ETH_MDIO" : 11,
  67. "PA2:EVENTOUT" : 15,
  68. "PA2:TIM2_CH3" : 1,
  69. "PA2:TIM5_CH3" : 2,
  70. "PA2:TIM9_CH1" : 3,
  71. "PA2:USART2_TX" : 7,
  72. "PA3:ETH_MII_COL" : 11,
  73. "PA3:EVENTOUT" : 15,
  74. "PA3:OTG_HS_ULPI_D0" : 10,
  75. "PA3:TIM2_CH4" : 1,
  76. "PA3:TIM5_CH4" : 2,
  77. "PA3:TIM9_CH2" : 3,
  78. "PA3:USART2_RX" : 7,
  79. "PA4:DCMI_HSYNC" : 13,
  80. "PA4:EVENTOUT" : 15,
  81. "PA4:OTG_HS_SOF" : 12,
  82. "PA4:SPI1_NSS" : 5,
  83. "PA4:SPI3_NSS" : 6,
  84. "PA4:I2S3_WS" : 6,
  85. "PA4:USART2_CK" : 7,
  86. "PA5:EVENTOUT" : 15,
  87. "PA5:OTG_HS_ULPI_CK" : 10,
  88. "PA5:SPI1_SCK" : 5,
  89. "PA5:TIM2_CH1" : 1,
  90. "PA5:TIM2_ETR" : 1,
  91. "PA5:TIM8_CH1N" : 3,
  92. "PA6:DCMI_PIXCK" : 13,
  93. "PA6:EVENTOUT" : 15,
  94. "PA6:SPI1_MISO" : 5,
  95. "PA6:TIM13_CH1" : 9,
  96. "PA6:TIM1_BKIN" : 1,
  97. "PA6:TIM3_CH1" : 2,
  98. "PA6:TIM8_BKIN" : 3,
  99. "PA7:ETH_MII_RX_DV" : 11,
  100. "PA7:ETH_RMII_CRS_DV" : 11,
  101. "PA7:EVENTOUT" : 15,
  102. "PA7:SPI1_MOSI" : 5,
  103. "PA7:TIM14_CH1" : 9,
  104. "PA7:TIM1_CH1N" : 1,
  105. "PA7:TIM3_CH2" : 2,
  106. "PA7:TIM8_CH1N" : 3,
  107. "PA8:EVENTOUT" : 15,
  108. "PA8:I2C3_SCL" : 4,
  109. "PA8:MCO1" : 0,
  110. "PA8:OTG_FS_SOF" : 10,
  111. "PA8:TIM1_CH1" : 1,
  112. "PA8:USART1_CK" : 7,
  113. "PA9:DCMI_D0" : 13,
  114. "PA9:EVENTOUT" : 15,
  115. "PA9:I2C3_SMBA" : 4,
  116. "PA9:TIM1_CH2" : 1,
  117. "PA9:USART1_TX" : 7,
  118. "PB0:ETH_MII_RXD2" : 11,
  119. "PB0:EVENTOUT" : 15,
  120. "PB0:OTG_HS_ULPI_D1" : 10,
  121. "PB0:TIM1_CH2N" : 1,
  122. "PB0:TIM3_CH3" : 2,
  123. "PB0:TIM8_CH2N" : 3,
  124. "PB10:ETH_MII_RX_ER" : 11,
  125. "PB10:EVENTOUT" : 15,
  126. "PB10:I2C2_SCL" : 4,
  127. "PB10:OTG_HS_ULPI_D3" : 10,
  128. "PB10:SPI2_SCK" : 5,
  129. "PB10:I2S2_CK" : 5,
  130. "PB10:TIM2_CH3" : 1,
  131. "PB10:USART3_TX" : 7,
  132. "PB11:ETH_MII_TX_EN" : 11,
  133. "PB11:ETH_RMII_TX_EN" : 11,
  134. "PB11:EVENTOUT" : 15,
  135. "PB11:I2C2_SDA" : 4,
  136. "PB11:OTG_HS_ULPI_D4" : 10,
  137. "PB11:TIM2_CH4" : 1,
  138. "PB11:USART3_RX" : 7,
  139. "PB12:CAN2_RX" : 9,
  140. "PB12:ETH_MII_TXD0" : 11,
  141. "PB12:ETH_RMII_TXD0" : 11,
  142. "PB12:EVENTOUT" : 15,
  143. "PB12:I2C2_SMBA" : 4,
  144. "PB12:OTG_HS_ID" : 12,
  145. "PB12:OTG_HS_ULPI_D5" : 10,
  146. "PB12:SPI2_NSS" : 5,
  147. "PB12:I2S2_WS" : 5,
  148. "PB12:TIM1_BKIN" : 1,
  149. "PB12:USART3_CK" : 7,
  150. "PB13:CAN2_TX" : 9,
  151. "PB13:ETH_MII_TXD1" : 11,
  152. "PB13:ETH_RMII_TXD1" : 11,
  153. "PB13:EVENTOUT" : 15,
  154. "PB13:OTG_HS_ULPI_D6" : 10,
  155. "PB13:SPI2_SCK" : 5,
  156. "PB13:I2S2_CK" : 5,
  157. "PB13:TIM1_CH1N" : 1,
  158. "PB13:USART3_CTS" : 7,
  159. "PB14:EVENTOUT" : 15,
  160. "PB14:I2S2EXT_SD" : 6,
  161. "PB14:OTG_HS_DM" : 12,
  162. "PB14:SPI2_MISO" : 5,
  163. "PB14:TIM12_CH1" : 9,
  164. "PB14:TIM1_CH2N" : 1,
  165. "PB14:TIM8_CH2N" : 3,
  166. "PB14:USART3_RTS" : 7,
  167. "PB15:RTC_REFIN" : 0,
  168. "PB15:TIM1_CH3N" : 1,
  169. "PB15:TIM8_CH3N" : 3,
  170. "PB15:SPI2_MOSI" : 5,
  171. "PB15:I2S2_SD" : 5,
  172. "PB15:TIM12_CH2" : 9,
  173. "PB15:OTG_HS_DP" : 12,
  174. "PB15:EVENTOUT" : 15,
  175. "PB1:ETH_MII_RXD3" : 11,
  176. "PB1:EVENTOUT" : 15,
  177. "PB1:OTG_HS_ULPI_D2" : 10,
  178. "PB1:TIM1_CH3N" : 1,
  179. "PB1:TIM3_CH4" : 2,
  180. "PB1:TIM8_CH3N" : 3,
  181. "PB2:EVENTOUT" : 15,
  182. "PB3:EVENTOUT" : 15,
  183. "PB3:JTDO" : 0,
  184. "PB3:SPI1_SCK" : 5,
  185. "PB3:I2S3_CK" : 6,
  186. "PB3:SPI3_SCK" : 6,
  187. "PB3:TIM2_CH2" : 1,
  188. "PB3:TRACESWO" : 0,
  189. "PB4:EVENTOUT" : 15,
  190. "PB4:I2S3EXT_SD" : 7,
  191. "PB4:NJTRST" : 0,
  192. "PB4:SPI1_MISO" : 5,
  193. "PB4:SPI3_MISO" : 6,
  194. "PB4:TIM3_CH1" : 2,
  195. "PB5:CAN2_RX" : 9,
  196. "PB5:DCMI_D10" : 13,
  197. "PB5:ETH_PPS_OUT" : 11,
  198. "PB5:EVENTOUT" : 15,
  199. "PB5:I2C1_SMBA" : 4,
  200. "PB5:OTG_HS_ULPI_D7" : 10,
  201. "PB5:SPI1_MOSI" : 5,
  202. "PB5:SPI3_MOSI" : 6,
  203. "PB5:I2S3_SD" : 6,
  204. "PB5:TIM3_CH2" : 2,
  205. "PB6:CAN2_TX" : 9,
  206. "PB6:DCMI_D5" : 13,
  207. "PB6:EVENTOUT" : 15,
  208. "PB6:I2C1_SCL" : 4,
  209. "PB6:TIM4_CH1" : 2,
  210. "PB6:USART1_TX" : 7,
  211. "PB7:DCMI_VSYNC" : 13,
  212. "PB7:EVENTOUT" : 15,
  213. "PB7:FSMC_NL" : 12,
  214. "PB7:I2C1_SDA" : 4,
  215. "PB7:TIM4_CH2" : 2,
  216. "PB7:USART1_RX" : 7,
  217. "PB8:CAN1_RX" : 9,
  218. "PB8:DCMI_D6" : 13,
  219. "PB8:ETH_MII_TXD3" : 11,
  220. "PB8:EVENTOUT" : 15,
  221. "PB8:I2C1_SCL" : 4,
  222. "PB8:SDIO_D4" : 12,
  223. "PB8:TIM10_CH1" : 3,
  224. "PB8:TIM4_CH3" : 2,
  225. "PB9:CAN1_TX" : 9,
  226. "PB9:DCMI_D7" : 13,
  227. "PB9:EVENTOUT" : 15,
  228. "PB9:I2C1_SDA" : 4,
  229. "PB9:SDIO_D5" : 12,
  230. "PB9:SPI2_NSS" : 5,
  231. "PB9:I2S2_WS" : 5,
  232. "PB9:TIM11_CH1" : 3,
  233. "PB9:TIM4_CH4" : 2,
  234. "PC0:EVENTOUT" : 15,
  235. "PC0:OTG_HS_ULPI_STP" : 10,
  236. "PC10:DCMI_D8" : 13,
  237. "PC10:EVENTOUT" : 15,
  238. "PC10:I2S3_CK" : 6,
  239. "PC10:SDIO_D2" : 12,
  240. "PC10:SPI3_SCK" : 6,
  241. "PC10:UART4_TX" : 8,
  242. "PC10:USART3_TX" : 7,
  243. "PC11:DCMI_D4" : 13,
  244. "PC11:EVENTOUT" : 15,
  245. "PC11:I2S3EXT_SD" : 5,
  246. "PC11:SDIO_D3" : 12,
  247. "PC11:SPI3_MISO" : 6,
  248. "PC11:UART4_RX" : 8,
  249. "PC11:USART3_RX" : 7,
  250. "PC12:DCMI_D9" : 13,
  251. "PC12:EVENTOUT" : 15,
  252. "PC12:SDIO_CK" : 12,
  253. "PC12:I2S3_SD" : 6,
  254. "PC12:SPI3_MOSI" : 6,
  255. "PC12:UART5_TX" : 8,
  256. "PC12:USART3_CK" : 7,
  257. "PC13:EVENTOUT" : 15,
  258. "PC14:EVENTOUT" : 15,
  259. "PC15:EVENTOUT" : 15,
  260. "PC1:ETH_MDC" : 11,
  261. "PC1:EVENTOUT" : 15,
  262. "PC2:ETH_MII_TXD2" : 11,
  263. "PC2:EVENTOUT" : 15,
  264. "PC2:I2S2EXT_SD" : 6,
  265. "PC2:OTG_HS_ULPI_DIR" : 10,
  266. "PC2:SPI2_MISO" : 5,
  267. "PC3:ETH_MII_TX_CLK" : 11,
  268. "PC3:EVENTOUT" : 15,
  269. "PC3:OTG_HS_ULPI_NXT" : 10,
  270. "PC3:SPI2_MOSI" : 5,
  271. "PC3:II2S2_SD" : 5,
  272. "PC4:ETH_MII_RXD0" : 11,
  273. "PC4:ETH_RMII_RXD0" : 11,
  274. "PC4:EVENTOUT" : 15,
  275. "PC5:ETH_MII_RXD1" : 11,
  276. "PC5:ETH_RMII_RXD1" : 11,
  277. "PC5:EVENTOUT" : 15,
  278. "PC6:DCMI_D0" : 13,
  279. "PC6:EVENTOUT" : 15,
  280. "PC6:I2S2_MCK" : 5,
  281. "PC6:SDIO_D6" : 12,
  282. "PC6:TIM3_CH1" : 2,
  283. "PC6:TIM8_CH1" : 3,
  284. "PC6:USART6_TX" : 8,
  285. "PC7:DCMI_D1" : 13,
  286. "PC7:EVENTOUT" : 15,
  287. "PC7:I2S3_MCK" : 6,
  288. "PC7:SDIO_D7" : 12,
  289. "PC7:TIM3_CH2" : 2,
  290. "PC7:TIM8_CH2" : 3,
  291. "PC7:USART6_RX" : 8,
  292. "PC8:DCMI_D2" : 13,
  293. "PC8:EVENTOUT" : 15,
  294. "PC8:SDIO_D0" : 12,
  295. "PC8:TIM3_CH3" : 2,
  296. "PC8:TIM8_CH3" : 3,
  297. "PC8:USART6_CK" : 8,
  298. "PC9:DCMI_D3" : 13,
  299. "PC9:EVENTOUT" : 15,
  300. "PC9:I2C3_SDA" : 4,
  301. "PC9:I2S_CKIN" : 5,
  302. "PC9:MCO2" : 0,
  303. "PC9:SDIO_D1" : 12,
  304. "PC9:TIM3_CH4" : 2,
  305. "PC9:TIM8_CH4" : 3,
  306. "PD0:CAN1_RX" : 9,
  307. "PD0:EVENTOUT" : 15,
  308. "PD0:FSMC_D2" : 12,
  309. "PD10:EVENTOUT" : 15,
  310. "PD10:FSMC_D15" : 12,
  311. "PD10:USART3_CK" : 7,
  312. "PD11:EVENTOUT" : 15,
  313. "PD11:FSMC_A16" : 12,
  314. "PD11:USART3_CTS" : 7,
  315. "PD12:EVENTOUT" : 15,
  316. "PD12:FSMC_A17" : 12,
  317. "PD12:TIM4_CH1" : 2,
  318. "PD12:USART3_RTS" : 7,
  319. "PD13:EVENTOUT" : 15,
  320. "PD13:FSMC_A18" : 12,
  321. "PD13:TIM4_CH2" : 2,
  322. "PD14:EVENTOUT" : 15,
  323. "PD14:FSMC_D0" : 12,
  324. "PD14:TIM4_CH3" : 2,
  325. "PD15:EVENTOUT" : 15,
  326. "PD15:FSMC_D1" : 12,
  327. "PD15:TIM4_CH4" : 2,
  328. "PD1:CAN1_TX" : 9,
  329. "PD1:EVENTOUT" : 15,
  330. "PD1:FSMC_D3" : 12,
  331. "PD2:DCMI_D11" : 13,
  332. "PD2:EVENTOUT" : 15,
  333. "PD2:SDIO_CMD" : 12,
  334. "PD2:TIM3_ETR" : 2,
  335. "PD2:UART5_RX" : 8,
  336. "PD3:EVENTOUT" : 15,
  337. "PD3:FSMC_CLK" : 12,
  338. "PD3:USART2_CTS" : 7,
  339. "PD4:EVENTOUT" : 15,
  340. "PD4:FSMC_NOE" : 12,
  341. "PD4:USART2_RTS" : 7,
  342. "PD5:EVENTOUT" : 15,
  343. "PD5:FSMC_NWE" : 12,
  344. "PD5:USART2_TX" : 7,
  345. "PD6:EVENTOUT" : 15,
  346. "PD6:FSMC_NWAIT" : 12,
  347. "PD6:USART2_RX" : 7,
  348. "PD7:EVENTOUT" : 15,
  349. "PD7:FSMC_NCE2" : 12,
  350. "PD7:FSMC_NE1" : 12,
  351. "PD7:USART2_CK" : 7,
  352. "PD8:EVENTOUT" : 15,
  353. "PD8:FSMC_D13" : 12,
  354. "PD8:USART3_TX" : 7,
  355. "PD9:EVENTOUT" : 15,
  356. "PD9:FSMC_D14" : 12,
  357. "PD9:USART3_RX" : 7,
  358. "PE0:DCMI_D2" : 13,
  359. "PE0:EVENTOUT" : 15,
  360. "PE0:FSMC_NBL0" : 12,
  361. "PE0:TIM4_ETR" : 2,
  362. "PE10:EVENTOUT" : 15,
  363. "PE10:FSMC_D7" : 12,
  364. "PE10:TIM1_CH2N" : 1,
  365. "PE11:EVENTOUT" : 15,
  366. "PE11:FSMC_D8" : 12,
  367. "PE11:TIM1_CH2" : 1,
  368. "PE12:EVENTOUT" : 15,
  369. "PE12:FSMC_D9" : 12,
  370. "PE12:TIM1_CH3N" : 1,
  371. "PE13:EVENTOUT" : 15,
  372. "PE13:FSMC_D10" : 12,
  373. "PE13:TIM1_CH3" : 1,
  374. "PE14:EVENTOUT" : 15,
  375. "PE14:FSMC_D11" : 12,
  376. "PE14:TIM1_CH4" : 1,
  377. "PE15:TIM1_BKIN" : 1,
  378. "PE15:FSMC_D12" : 12,
  379. "PE15:EVENTOUT" : 15,
  380. "PE1:DCMI_D3" : 13,
  381. "PE1:EVENTOUT" : 15,
  382. "PE1:FSMC_NBL1" : 12,
  383. "PE2:ETH_MII_TXD3" : 11,
  384. "PE2:EVENTOUT" : 15,
  385. "PE2:FSMC_A23" : 12,
  386. "PE2:TRACECLK" : 0,
  387. "PE3:EVENTOUT" : 15,
  388. "PE3:FSMC_A19" : 12,
  389. "PE3:TRACED0" : 0,
  390. "PE4:DCMI_D4" : 13,
  391. "PE4:EVENTOUT" : 15,
  392. "PE4:FSMC_A20" : 12,
  393. "PE4:TRACED1" : 0,
  394. "PE5:DCMI_D6" : 13,
  395. "PE5:EVENTOUT" : 15,
  396. "PE5:FSMC_A21" : 12,
  397. "PE5:TIM9_CH1" : 3,
  398. "PE5:TRACED2" : 0,
  399. "PE6:DCMI_D7" : 13,
  400. "PE6:EVENTOUT" : 15,
  401. "PE6:FSMC_A22" : 12,
  402. "PE6:TIM9_CH2" : 3,
  403. "PE6:TRACED3" : 0,
  404. "PE7:EVENTOUT" : 15,
  405. "PE7:FSMC_D4" : 12,
  406. "PE7:TIM1_ETR" : 1,
  407. "PE8:EVENTOUT" : 15,
  408. "PE8:FSMC_D5" : 12,
  409. "PE8:TIM1_CH1N" : 1,
  410. "PE9:EVENTOUT" : 15,
  411. "PE9:FSMC_D6" : 12,
  412. "PE9:TIM1_CH1" : 1,
  413. "PF0:EVENTOUT" : 15,
  414. "PF0:FSMC_A0" : 12,
  415. "PF0:I2C2_SDA" : 4,
  416. "PF10:EVENTOUT" : 15,
  417. "PF10:FSMC_INTR" : 12,
  418. "PF11:DCMI_D12" : 13,
  419. "PF11:EVENTOUT" : 15,
  420. "PF12:EVENTOUT" : 15,
  421. "PF12:FSMC_A6" : 12,
  422. "PF13:EVENTOUT" : 15,
  423. "PF13:FSMC_A7" : 12,
  424. "PF14:EVENTOUT" : 15,
  425. "PF14:FSMC_A8" : 12,
  426. "PF15:EVENTOUT" : 15,
  427. "PF15:FSMC_A9" : 12,
  428. "PF1:EVENTOUT" : 15,
  429. "PF1:FSMC_A1" : 12,
  430. "PF1:I2C2_SCL" : 4,
  431. "PF2:EVENTOUT" : 15,
  432. "PF2:FSMC_A2" : 12,
  433. "PF2:I2C2_SMBA" : 4,
  434. "PF3:EVENTOUT" : 15,
  435. "PF3:FSMC_A3" : 12,
  436. "PF4:EVENTOUT" : 15,
  437. "PF4:FSMC_A4" : 12,
  438. "PF5:EVENTOUT" : 15,
  439. "PF5:FSMC_A5" : 12,
  440. "PF6:EVENTOUT" : 15,
  441. "PF6:FSMC_NIORD" : 12,
  442. "PF6:TIM10_CH1" : 3,
  443. "PF7:EVENTOUT" : 15,
  444. "PF7:FSMC_NREG" : 12,
  445. "PF7:TIM11_CH1" : 3,
  446. "PF8:EVENTOUT" : 15,
  447. "PF8:FSMC_NIOWR" : 12,
  448. "PF8:TIM13_CH1" : 9,
  449. "PF9:EVENTOUT" : 15,
  450. "PF9:FSMC_CD" : 12,
  451. "PF9:TIM14_CH1" : 9,
  452. "PG0:EVENTOUT" : 15,
  453. "PG0:FSMC_A10" : 12,
  454. "PG10:EVENTOUT" : 15,
  455. "PG10:FSMC_NCE4_1" : 12,
  456. "PG10:FSMC_NE3" : 12,
  457. "PG11:ETH_MII_TX_EN" : 11,
  458. "PG11:ETH_RMII_TX_EN" : 11,
  459. "PG11:EVENTOUT" : 15,
  460. "PG11:FSMC_NCE4_2" : 12,
  461. "PG12:EVENTOUT" : 15,
  462. "PG12:FSMC_NE4" : 12,
  463. "PG12:USART6_RTS" : 8,
  464. "PG13:ETH_MII_TXD0" : 11,
  465. "PG13:ETH_RMII_TXD0" : 11,
  466. "PG13:EVENTOUT" : 15,
  467. "PG13:FSMC_A24" : 12,
  468. "PG13:UART6_CTS" : 8,
  469. "PG14:ETH_MII_TXD1" : 11,
  470. "PG14:ETH_RMII_TXD1" : 11,
  471. "PG14:EVENTOUT" : 15,
  472. "PG14:FSMC_A25" : 12,
  473. "PG14:USART6_TX" : 8,
  474. "PG15:USART6_CTS" : 8,
  475. "PG15:DCMI_D13" : 13,
  476. "PG15:EVENTOUT" : 15,
  477. "PG1:EVENTOUT" : 15,
  478. "PG1:FSMC_A11" : 12,
  479. "PG2:EVENTOUT" : 15,
  480. "PG2:FSMC_A12" : 12,
  481. "PG3:EVENTOUT" : 15,
  482. "PG3:FSMC_A13" : 12,
  483. "PG4:EVENTOUT" : 15,
  484. "PG4:FSMC_A14" : 12,
  485. "PG5:EVENTOUT" : 15,
  486. "PG5:FSMC_A15" : 12,
  487. "PG6:EVENTOUT" : 15,
  488. "PG6:FSMC_INT2" : 12,
  489. "PG7:EVENTOUT" : 15,
  490. "PG7:FSMC_INT3" : 12,
  491. "PG7:USART6_CK" : 8,
  492. "PG8:ETH_PPS_OUT" : 11,
  493. "PG8:EVENTOUT" : 15,
  494. "PG8:USART6_RTS" : 8,
  495. "PG9:EVENTOUT" : 15,
  496. "PG9:FSMC_NCE3" : 12,
  497. "PG9:FSMC_NE2" : 12,
  498. "PG9:USART6_RX" : 8,
  499. "PH0:EVENTOUT" : 15,
  500. "PH10:DCMI_D1" : 13,
  501. "PH10:EVENTOUT" : 15,
  502. "PH10:TIM5_CH1" : 2,
  503. "PH11:DCMI_D2" : 13,
  504. "PH11:EVENTOUT" : 15,
  505. "PH11:TIM5_CH2" : 2,
  506. "PH12:DCMI_D3" : 13,
  507. "PH12:EVENTOUT" : 15,
  508. "PH12:TIM5_CH3" : 2,
  509. "PH13:CAN1_TX" : 9,
  510. "PH13:EVENTOUT" : 15,
  511. "PH13:TIM8_CH1N" : 3,
  512. "PH14:DCMI_D4" : 13,
  513. "PH14:EVENTOUT" : 15,
  514. "PH14:TIM8_CH2N" : 3,
  515. "PH15:DCMI_D11" : 13,
  516. "PH15:EVENTOUT" : 15,
  517. "PH15:TIM8_CH3N" : 3,
  518. "PH1:EVENTOUT" : 15,
  519. "PH2:ETH_MII_CRS" : 11,
  520. "PH2:EVENTOUT" : 15,
  521. "PH3:ETH_MII_COL" : 11,
  522. "PH3:EVENTOUT" : 15,
  523. "PH4:EVENTOUT" : 15,
  524. "PH4:I2C2_SCL" : 4,
  525. "PH4:OTG_HS_ULPI_NXT" : 10,
  526. "PH5:EVENTOUT" : 15,
  527. "PH5:I2C2_SDA" : 4,
  528. "PH6:ETH_MII_RXD2" : 11,
  529. "PH6:EVENTOUT" : 15,
  530. "PH6:I2C2_SMBA" : 4,
  531. "PH6:TIM12_CH1" : 9,
  532. "PH7:ETH_MII_RXD3" : 11,
  533. "PH7:EVENTOUT" : 15,
  534. "PH7:I2C3_SCL" : 4,
  535. "PH8:DCMI_HSYNC" : 13,
  536. "PH8:EVENTOUT" : 15,
  537. "PH8:I2C3_SDA" : 4,
  538. "PH9:DCMI_D0" : 13,
  539. "PH9:EVENTOUT" : 15,
  540. "PH9:I2C3_SMBA" : 4,
  541. "PH9:TIM12_CH2" : 9,
  542. }
  543. ADC1_map = {
  544. # format is PIN : ADC1_CHAN
  545. # extracted from tabula-addfunc-F405.csv
  546. "PA0" : 0,
  547. "PA1" : 1,
  548. "PA2" : 2,
  549. "PA3" : 3,
  550. "PA4" : 4,
  551. "PA5" : 5,
  552. "PA6" : 6,
  553. "PA7" : 7,
  554. "PB0" : 8,
  555. "PB1" : 9,
  556. "PC0" : 10,
  557. "PC1" : 11,
  558. "PC2" : 12,
  559. "PC3" : 13,
  560. "PC4" : 14,
  561. "PC5" : 15,
  562. }
  563. DMA_Map = {
  564. # format is (DMA_TABLE, StreamNum, Channel)
  565. # extracted from tabula-STM32F405-DMA.csv
  566. "ADC1" : [(2,0,0),(2,4,0)],
  567. "ADC2" : [(2,2,1),(2,3,1)],
  568. "ADC3" : [(2,0,2),(2,1,2)],
  569. "CRYP_IN" : [(2,6,2)],
  570. "CRYP_OUT" : [(2,5,2)],
  571. "DAC1" : [(1,5,7)],
  572. "DAC2" : [(1,6,7)],
  573. "DCMI" : [(2,1,1),(2,7,1)],
  574. "HASH_IN" : [(2,7,2)],
  575. "I2C1_RX" : [(1,0,1),(1,5,1)],
  576. "I2C1_TX" : [(1,6,1),(1,7,1)],
  577. "I2C2_RX" : [(1,2,7),(1,3,7)],
  578. "I2C2_TX" : [(1,7,7)],
  579. "I2C3_RX" : [(1,2,3)],
  580. "I2C3_TX" : [(1,4,3)],
  581. "I2S2_EXT_RX" : [(1,3,3)],
  582. "I2S2_EXT_TX" : [(1,4,2)],
  583. "I2S3_EXT_RX" : [(1,2,2),(1,0,3)],
  584. "I2S3_EXT_TX" : [(1,5,2)],
  585. "SAI1_A" : [(2,1,0),(2,3,0)],
  586. "SAI1_B" : [(2,5,0),(2,4,1)],
  587. "SDIO" : [(2,3,4),(2,6,4)],
  588. "SPI1_RX" : [(2,0,3),(2,2,3)],
  589. "SPI1_TX" : [(2,3,3),(2,5,3)],
  590. "SPI2_RX" : [(1,3,0)],
  591. "SPI2_TX" : [(1,4,0)],
  592. "SPI3_RX" : [(1,0,0),(1,2,0)],
  593. "SPI3_TX" : [(1,5,0),(1,7,0)],
  594. "SPI4_RX" : [(2,0,4),(2,3,5)],
  595. "SPI4_TX" : [(2,1,4),(2,4,5)],
  596. "SPI5_RX" : [(2,3,2),(2,5,7)],
  597. "SPI5_TX" : [(2,4,2),(2,6,7)],
  598. "SPI6_RX" : [(2,6,1)],
  599. "SPI6_TX" : [(2,5,1)],
  600. "TIM1_CH1" : [(2,6,0),(2,1,6),(2,3,6)],
  601. "TIM1_CH2" : [(2,6,0),(2,2,6)],
  602. "TIM1_CH3" : [(2,6,0),(2,6,6)],
  603. "TIM1_CH4" : [(2,4,6)],
  604. "TIM1_COM" : [(2,4,6)],
  605. "TIM1_TRIG" : [(2,0,6),(2,4,6)],
  606. "TIM1_UP" : [(2,5,6)],
  607. "TIM2_CH1" : [(1,5,3)],
  608. "TIM2_CH2" : [(1,6,3)],
  609. "TIM2_CH3" : [(1,1,3)],
  610. "TIM2_CH4" : [(1,6,3),(1,7,3)],
  611. "TIM2_UP" : [(1,1,3),(1,7,3)],
  612. "TIM3_CH1" : [(1,4,5)],
  613. "TIM3_CH2" : [(1,5,5)],
  614. "TIM3_CH3" : [(1,7,5)],
  615. "TIM3_CH4" : [(1,2,5)],
  616. "TIM3_TRIG" : [(1,4,5)],
  617. "TIM3_UP" : [(1,2,5)],
  618. "TIM4_CH1" : [(1,0,2)],
  619. "TIM4_CH2" : [(1,3,2)],
  620. "TIM4_CH3" : [(1,7,2)],
  621. "TIM4_UP" : [(1,6,2)],
  622. "TIM5_CH1" : [(1,2,6)],
  623. "TIM5_CH2" : [(1,4,6)],
  624. "TIM5_CH3" : [(1,0,6)],
  625. "TIM5_CH4" : [(1,1,6),(1,3,6)],
  626. "TIM5_TRIG" : [(1,1,6),(1,3,6)],
  627. "TIM5_UP" : [(1,0,6),(1,6,6)],
  628. "TIM6_UP" : [(1,1,7)],
  629. "TIM7_UP" : [(1,2,1),(1,4,1)],
  630. "TIM8_CH1" : [(2,2,0),(2,2,7)],
  631. "TIM8_CH2" : [(2,2,0),(2,3,7)],
  632. "TIM8_CH3" : [(2,2,0),(2,4,7)],
  633. "TIM8_CH4" : [(2,7,7)],
  634. "TIM8_COM" : [(2,7,7)],
  635. "TIM8_TRIG" : [(2,7,7)],
  636. "TIM8_UP" : [(2,1,7)],
  637. "UART4_RX" : [(1,2,4)],
  638. "UART4_TX" : [(1,4,4)],
  639. "UART5_RX" : [(1,0,4)],
  640. "UART5_TX" : [(1,7,4)],
  641. "UART7_RX" : [(1,3,5)],
  642. "UART7_TX" : [(1,1,5)],
  643. "UART8_RX" : [(1,6,5)],
  644. "UART8_TX" : [(1,0,5)],
  645. "USART1_RX" : [(2,2,4),(2,5,4)],
  646. "USART1_TX" : [(2,7,4)],
  647. "USART2_RX" : [(1,5,4)],
  648. "USART2_TX" : [(1,6,4)],
  649. "USART3_RX" : [(1,1,4)],
  650. "USART3_TX" : [(1,3,4),(1,4,7)],
  651. "USART6_RX" : [(2,1,5),(2,2,5)],
  652. "USART6_TX" : [(2,6,5),(2,7,5)],
  653. }