N3_sub/modules/ChibiOS/testhal/STM32/STM32F4xx/IRQ_STORM/iar/ch.icf

/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
define symbol __ICFEDIT_region_ROM_end__   = 0x0801FFFF;
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
define symbol __ICFEDIT_region_RAM_end__   = 0x2001FFFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__   = 0x400;
/**** End of ICF editor section. ###ICF###*/

/* Size of the IRQ Stack (Main Stack).*/
define symbol __ICFEDIT_size_irqstack__   = 0x400;

define memory mem with size = 4G;
define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];

define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   {section CSTACK};
define block IRQSTACK  with alignment = 8, size = __ICFEDIT_size_irqstack__ {};
define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     {};
define block SYSHEAP   with alignment = 8                                   {section SYSHEAP};
define block DATABSS with alignment = 8 {readwrite, zeroinit};

initialize by copy { readwrite };
do not initialize  { section .noinit };

keep { section .intvec };

place at address mem:__ICFEDIT_intvec_start__ {section .intvec};
place in ROM_region                           {readonly};
place at start of RAM_region                  {block IRQSTACK};
place in RAM_region                           {block DATABSS, block HEAP};
place in RAM_region                           {block SYSHEAP};
place at end of RAM_region                    {block CSTACK};