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
  1. <!doctype html public "-//w3c//dtd html 4.0 transitional//en">
    2. 

  2. <html><head>
    3. 

  3. <title>Static Call Graph - [.\Objects\N3Drive.axf]</title></head>
    4. 

  4. <body><HR>
    5. 

  5. <H1>Static Call Graph for image .\Objects\N3Drive.axf</H1><HR>
    6. 

  6. <BR><P>#&#060CALLGRAPH&#062# ARM Linker, 5060750: Last Updated: Tue Jul 18 09:42:18 2023
    7. 

  7. <BR><P>
    8. 

  8. <H3>Maximum Stack Usage =        168 bytes + Unknown(Cycles, Untraceable Function Pointers)</H3><H3>
    9. 

  9. Call chain for Maximum Stack Depth:</H3>
    10. 

  10. CAN1_RX0_IRQHandler &rArr; Rec_Flash_Set &rArr; __aeabi_dmul &rArr; _double_epilogue &rArr; _double_round
    11. 

  11. <P>
    12. 

  12. <H3>
    13. 

  13. Mutually Recursive functions
    14. 

  14. </H3> <LI><a href="#[1]">NMI_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[1]">NMI_Handler</a><BR>
    15. 

  15.  <LI><a href="#[3]">MemManage_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[3]">MemManage_Handler</a><BR>
    16. 

  16.  <LI><a href="#[4]">BusFault_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[4]">BusFault_Handler</a><BR>
    17. 

  17.  <LI><a href="#[5]">UsageFault_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[5]">UsageFault_Handler</a><BR>
    18. 

  18.  <LI><a href="#[6]">SVC_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[6]">SVC_Handler</a><BR>
    19. 

  19.  <LI><a href="#[7]">DebugMon_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[7]">DebugMon_Handler</a><BR>
    20. 

  20.  <LI><a href="#[8]">PendSV_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[8]">PendSV_Handler</a><BR>
    21. 

  21.  <LI><a href="#[1c]">ADC_IRQHandler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[1c]">ADC_IRQHandler</a><BR>
    22. 

  22.  <LI><a href="#[2]">HardFault_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[2]">HardFault_Handler</a><BR>
    23. 

  23. </UL>
    24. 

  24. <P>
    25. 

  25. <H3>
    26. 

  26. Function Pointers
    27. 

  27. </H3><UL>
    28. 

  28.  <LI><a href="#[1c]">ADC_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    29. 

  29.  <LI><a href="#[4]">BusFault_Handler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    30. 

  30.  <LI><a href="#[1e]">CAN1_RX0_IRQHandler</a> from it.o(i.CAN1_RX0_IRQHandler) referenced from startup_stm32f40_41xxx.o(RESET)
    31. 

  31.  <LI><a href="#[1f]">CAN1_RX1_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    32. 

  32.  <LI><a href="#[20]">CAN1_SCE_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    33. 

  33.  <LI><a href="#[1d]">CAN1_TX_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    34. 

  34.  <LI><a href="#[4a]">CAN2_RX0_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    35. 

  35.  <LI><a href="#[4b]">CAN2_RX1_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    36. 

  36.  <LI><a href="#[4c]">CAN2_SCE_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    37. 

  37.  <LI><a href="#[49]">CAN2_TX_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    38. 

  38.  <LI><a href="#[59]">CRYP_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    39. 

  39.  <LI><a href="#[58]">DCMI_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    40. 

  40.  <LI><a href="#[15]">DMA1_Stream0_IRQHandler</a> from it.o(i.DMA1_Stream0_IRQHandler) referenced from startup_stm32f40_41xxx.o(RESET)
    41. 

  41.  <LI><a href="#[16]">DMA1_Stream1_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    42. 

  42.  <LI><a href="#[17]">DMA1_Stream2_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    43. 

  43.  <LI><a href="#[18]">DMA1_Stream3_IRQHandler</a> from it.o(i.DMA1_Stream3_IRQHandler) referenced from startup_stm32f40_41xxx.o(RESET)
    44. 

  44.  <LI><a href="#[19]">DMA1_Stream4_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    45. 

  45.  <LI><a href="#[1a]">DMA1_Stream5_IRQHandler</a> from it.o(i.DMA1_Stream5_IRQHandler) referenced from startup_stm32f40_41xxx.o(RESET)
    46. 

  46.  <LI><a href="#[1b]">DMA1_Stream6_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    47. 

  47.  <LI><a href="#[39]">DMA1_Stream7_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    48. 

  48.  <LI><a href="#[42]">DMA2_Stream0_IRQHandler</a> from it.o(i.DMA2_Stream0_IRQHandler) referenced from startup_stm32f40_41xxx.o(RESET)
    49. 

  49.  <LI><a href="#[43]">DMA2_Stream1_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    50. 

  50.  <LI><a href="#[44]">DMA2_Stream2_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    51. 

  51.  <LI><a href="#[45]">DMA2_Stream3_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    52. 

  52.  <LI><a href="#[46]">DMA2_Stream4_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    53. 

  53.  <LI><a href="#[4e]">DMA2_Stream5_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    54. 

  54.  <LI><a href="#[4f]">DMA2_Stream6_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    55. 

  55.  <LI><a href="#[50]">DMA2_Stream7_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    56. 

  56.  <LI><a href="#[7]">DebugMon_Handler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    57. 

  57.  <LI><a href="#[47]">ETH_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    58. 

  58.  <LI><a href="#[48]">ETH_WKUP_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    59. 

  59.  <LI><a href="#[10]">EXTI0_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    60. 

  60.  <LI><a href="#[32]">EXTI15_10_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    61. 

  61.  <LI><a href="#[11]">EXTI1_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    62. 

  62.  <LI><a href="#[12]">EXTI2_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    63. 

  63.  <LI><a href="#[13]">EXTI3_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    64. 

  64.  <LI><a href="#[14]">EXTI4_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    65. 

  65.  <LI><a href="#[21]">EXTI9_5_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    66. 

  66.  <LI><a href="#[e]">FLASH_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    67. 

  67.  <LI><a href="#[5b]">FPU_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    68. 

  68.  <LI><a href="#[3a]">FSMC_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    69. 

  69.  <LI><a href="#[5a]">HASH_RNG_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    70. 

  70.  <LI><a href="#[2]">HardFault_Handler</a> from it.o(i.HardFault_Handler) referenced from startup_stm32f40_41xxx.o(RESET)
    71. 

  71.  <LI><a href="#[2a]">I2C1_ER_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    72. 

  72.  <LI><a href="#[29]">I2C1_EV_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    73. 

  73.  <LI><a href="#[2c]">I2C2_ER_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    74. 

  74.  <LI><a href="#[2b]">I2C2_EV_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    75. 

  75.  <LI><a href="#[53]">I2C3_ER_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    76. 

  76.  <LI><a href="#[52]">I2C3_EV_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    77. 

  77.  <LI><a href="#[3]">MemManage_Handler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    78. 

  78.  <LI><a href="#[1]">NMI_Handler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    79. 

  79.  <LI><a href="#[4d]">OTG_FS_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    80. 

  80.  <LI><a href="#[34]">OTG_FS_WKUP_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    81. 

  81.  <LI><a href="#[55]">OTG_HS_EP1_IN_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    82. 

  82.  <LI><a href="#[54]">OTG_HS_EP1_OUT_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    83. 

  83.  <LI><a href="#[57]">OTG_HS_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    84. 

  84.  <LI><a href="#[56]">OTG_HS_WKUP_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    85. 

  85.  <LI><a href="#[b]">PVD_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    86. 

  86.  <LI><a href="#[8]">PendSV_Handler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    87. 

  87.  <LI><a href="#[61]">RCC_APB1PeriphClockCmd</a> from stm32f4xx_rcc.o(i.RCC_APB1PeriphClockCmd) referenced from main.o(i.ADC_Config)
    88. 

  88.  <LI><a href="#[61]">RCC_APB1PeriphClockCmd</a> from stm32f4xx_rcc.o(i.RCC_APB1PeriphClockCmd) referenced from main.o(i.Dshot_Config)
    89. 

  89.  <LI><a href="#[61]">RCC_APB1PeriphClockCmd</a> from stm32f4xx_rcc.o(i.RCC_APB1PeriphClockCmd) referenced from main.o(i.USART_Config)
    90. 

  90.  <LI><a href="#[64]">RCC_APB2PeriphClockCmd</a> from stm32f4xx_rcc.o(i.RCC_APB2PeriphClockCmd) referenced from main.o(i.Dshot_Config)
    91. 

  91.  <LI><a href="#[64]">RCC_APB2PeriphClockCmd</a> from stm32f4xx_rcc.o(i.RCC_APB2PeriphClockCmd) referenced from main.o(i.USART_Config)
    92. 

  92.  <LI><a href="#[f]">RCC_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    93. 

  93.  <LI><a href="#[33]">RTC_Alarm_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    94. 

  94.  <LI><a href="#[d]">RTC_WKUP_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    95. 

  95.  <LI><a href="#[0]">Reset_Handler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    96. 

  96.  <LI><a href="#[3b]">SDIO_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    97. 

  97.  <LI><a href="#[2d]">SPI1_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    98. 

  98.  <LI><a href="#[2e]">SPI2_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    99. 

  99.  <LI><a href="#[3d]">SPI3_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    100. 

  100.  <LI><a href="#[6]">SVC_Handler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    101. 

  101.  <LI><a href="#[9]">SysTick_Handler</a> from it.o(i.SysTick_Handler) referenced from startup_stm32f40_41xxx.o(RESET)
    102. 

  102.  <LI><a href="#[5d]">SystemInit</a> from system_stm32f4xx.o(i.SystemInit) referenced from startup_stm32f40_41xxx.o(.text)
    103. 

  103.  <LI><a href="#[c]">TAMP_STAMP_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    104. 

  104.  <LI><a href="#[22]">TIM1_BRK_TIM9_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    105. 

  105.  <LI><a href="#[25]">TIM1_CC_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    106. 

  106.  <LI><a href="#[24]">TIM1_TRG_COM_TIM11_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    107. 

  107.  <LI><a href="#[23]">TIM1_UP_TIM10_IRQHandler</a> from it.o(i.TIM1_UP_TIM10_IRQHandler) referenced from startup_stm32f40_41xxx.o(RESET)
    108. 

  108.  <LI><a href="#[26]">TIM2_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    109. 

  109.  <LI><a href="#[27]">TIM3_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    110. 

  110.  <LI><a href="#[28]">TIM4_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    111. 

  111.  <LI><a href="#[3c]">TIM5_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    112. 

  112.  <LI><a href="#[40]">TIM6_DAC_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    113. 

  113.  <LI><a href="#[41]">TIM7_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    114. 

  114.  <LI><a href="#[35]">TIM8_BRK_TIM12_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    115. 

  115.  <LI><a href="#[38]">TIM8_CC_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    116. 

  116.  <LI><a href="#[37]">TIM8_TRG_COM_TIM14_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    117. 

  117.  <LI><a href="#[36]">TIM8_UP_TIM13_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    118. 

  118.  <LI><a href="#[60]">TIM_OC1Init</a> from stm32f4xx_tim.o(i.TIM_OC1Init) referenced from main.o(i.ADC_Config)
    119. 

  119.  <LI><a href="#[60]">TIM_OC1Init</a> from stm32f4xx_tim.o(i.TIM_OC1Init) referenced from main.o(i.Dshot_Config)
    120. 

  120.  <LI><a href="#[5f]">TIM_OC1PreloadConfig</a> from stm32f4xx_tim.o(i.TIM_OC1PreloadConfig) referenced from main.o(i.ADC_Config)
    121. 

  121.  <LI><a href="#[5f]">TIM_OC1PreloadConfig</a> from stm32f4xx_tim.o(i.TIM_OC1PreloadConfig) referenced from main.o(i.Dshot_Config)
    122. 

  122.  <LI><a href="#[63]">TIM_OC2Init</a> from stm32f4xx_tim.o(i.TIM_OC2Init) referenced from main.o(i.Dshot_Config)
    123. 

  123.  <LI><a href="#[62]">TIM_OC2PreloadConfig</a> from stm32f4xx_tim.o(i.TIM_OC2PreloadConfig) referenced from main.o(i.Dshot_Config)
    124. 

  124.  <LI><a href="#[3e]">UART4_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    125. 

  125.  <LI><a href="#[3f]">UART5_IRQHandler</a> from it.o(i.UART5_IRQHandler) referenced from startup_stm32f40_41xxx.o(RESET)
    126. 

  126.  <LI><a href="#[2f]">USART1_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    127. 

  127.  <LI><a href="#[30]">USART2_IRQHandler</a> from it.o(i.USART2_IRQHandler) referenced from startup_stm32f40_41xxx.o(RESET)
    128. 

  128.  <LI><a href="#[31]">USART3_IRQHandler</a> from it.o(i.USART3_IRQHandler) referenced from startup_stm32f40_41xxx.o(RESET)
    129. 

  129.  <LI><a href="#[51]">USART6_IRQHandler</a> from it.o(i.USART6_IRQHandler) referenced from startup_stm32f40_41xxx.o(RESET)
    130. 

  130.  <LI><a href="#[5]">UsageFault_Handler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    131. 

  131.  <LI><a href="#[a]">WWDG_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    132. 

  132.  <LI><a href="#[5e]">__main</a> from entry.o(.ARM.Collect$$$$00000000) referenced from startup_stm32f40_41xxx.o(.text)
    133. 

  133.  <LI><a href="#[5c]">main</a> from main.o(i.main) referenced from entry9a.o(.ARM.Collect$$$$0000000B)
    134. 

  134. </UL>
    135. 

  135. <P>
    136. 

  136. <H3>
    137. 

  137. Global Symbols
    138. 

  138. </H3>
    139. 

  139. <P><STRONG><a name="[5e]"></a>__main</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry.o(.ARM.Collect$$$$00000000))
    140. 

  140. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(.text)
    141. 

  141. </UL>
    142. 

  142. <P><STRONG><a name="[ff]"></a>_main_stk</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry2.o(.ARM.Collect$$$$00000001))
    143. 

  143. 

  144. <P><STRONG><a name="[65]"></a>_main_scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))
    145. 

  145. <BR><BR>[Calls]<UL><LI><a href="#[66]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload
    146. 

  146. </UL>
    147. 

  147. 

  148. <P><STRONG><a name="[77]"></a>__main_after_scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))
    149. 

  149. <BR><BR>[Called By]<UL><LI><a href="#[66]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload
    150. 

  150. </UL>
    151. 

  151. 

  152. <P><STRONG><a name="[100]"></a>_main_clock</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry7b.o(.ARM.Collect$$$$00000008))
    153. 

  153. 

  154. <P><STRONG><a name="[101]"></a>_main_cpp_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry8b.o(.ARM.Collect$$$$0000000A))
    155. 

  155. 

  156. <P><STRONG><a name="[102]"></a>_main_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry9a.o(.ARM.Collect$$$$0000000B))
    157. 

  157. 

  158. <P><STRONG><a name="[103]"></a>__rt_final_cpp</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry10a.o(.ARM.Collect$$$$0000000D))
    159. 

  159. 

  160. <P><STRONG><a name="[104]"></a>__rt_final_exit</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry11a.o(.ARM.Collect$$$$0000000F))
    161. 

  161. 

  162. <P><STRONG><a name="[0]"></a>Reset_Handler</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    163. 

  163. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    164. 

  164. </UL>
    165. 

  165. <P><STRONG><a name="[1]"></a>NMI_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    166. 

  166. <BR><BR>[Calls]<UL><LI><a href="#[1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NMI_Handler
    167. 

  167. </UL>
    168. 

  168. <BR>[Called By]<UL><LI><a href="#[1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NMI_Handler
    169. 

  169. </UL>
    170. 

  170. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    171. 

  171. </UL>
    172. 

  172. <P><STRONG><a name="[3]"></a>MemManage_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    173. 

  173. <BR><BR>[Calls]<UL><LI><a href="#[3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MemManage_Handler
    174. 

  174. </UL>
    175. 

  175. <BR>[Called By]<UL><LI><a href="#[3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MemManage_Handler
    176. 

  176. </UL>
    177. 

  177. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    178. 

  178. </UL>
    179. 

  179. <P><STRONG><a name="[4]"></a>BusFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    180. 

  180. <BR><BR>[Calls]<UL><LI><a href="#[4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BusFault_Handler
    181. 

  181. </UL>
    182. 

  182. <BR>[Called By]<UL><LI><a href="#[4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BusFault_Handler
    183. 

  183. </UL>
    184. 

  184. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    185. 

  185. </UL>
    186. 

  186. <P><STRONG><a name="[5]"></a>UsageFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    187. 

  187. <BR><BR>[Calls]<UL><LI><a href="#[5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UsageFault_Handler
    188. 

  188. </UL>
    189. 

  189. <BR>[Called By]<UL><LI><a href="#[5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UsageFault_Handler
    190. 

  190. </UL>
    191. 

  191. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    192. 

  192. </UL>
    193. 

  193. <P><STRONG><a name="[6]"></a>SVC_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    194. 

  194. <BR><BR>[Calls]<UL><LI><a href="#[6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SVC_Handler
    195. 

  195. </UL>
    196. 

  196. <BR>[Called By]<UL><LI><a href="#[6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SVC_Handler
    197. 

  197. </UL>
    198. 

  198. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    199. 

  199. </UL>
    200. 

  200. <P><STRONG><a name="[7]"></a>DebugMon_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    201. 

  201. <BR><BR>[Calls]<UL><LI><a href="#[7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DebugMon_Handler
    202. 

  202. </UL>
    203. 

  203. <BR>[Called By]<UL><LI><a href="#[7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DebugMon_Handler
    204. 

  204. </UL>
    205. 

  205. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    206. 

  206. </UL>
    207. 

  207. <P><STRONG><a name="[8]"></a>PendSV_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    208. 

  208. <BR><BR>[Calls]<UL><LI><a href="#[8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;PendSV_Handler
    209. 

  209. </UL>
    210. 

  210. <BR>[Called By]<UL><LI><a href="#[8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;PendSV_Handler
    211. 

  211. </UL>
    212. 

  212. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    213. 

  213. </UL>
    214. 

  214. <P><STRONG><a name="[1c]"></a>ADC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    215. 

  215. <BR><BR>[Calls]<UL><LI><a href="#[1c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_IRQHandler
    216. 

  216. </UL>
    217. 

  217. <BR>[Called By]<UL><LI><a href="#[1c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_IRQHandler
    218. 

  218. </UL>
    219. 

  219. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    220. 

  220. </UL>
    221. 

  221. <P><STRONG><a name="[1f]"></a>CAN1_RX1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    222. 

  222. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    223. 

  223. </UL>
    224. 

  224. <P><STRONG><a name="[20]"></a>CAN1_SCE_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    225. 

  225. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    226. 

  226. </UL>
    227. 

  227. <P><STRONG><a name="[1d]"></a>CAN1_TX_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    228. 

  228. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    229. 

  229. </UL>
    230. 

  230. <P><STRONG><a name="[4a]"></a>CAN2_RX0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    231. 

  231. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    232. 

  232. </UL>
    233. 

  233. <P><STRONG><a name="[4b]"></a>CAN2_RX1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    234. 

  234. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    235. 

  235. </UL>
    236. 

  236. <P><STRONG><a name="[4c]"></a>CAN2_SCE_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    237. 

  237. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    238. 

  238. </UL>
    239. 

  239. <P><STRONG><a name="[49]"></a>CAN2_TX_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    240. 

  240. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    241. 

  241. </UL>
    242. 

  242. <P><STRONG><a name="[59]"></a>CRYP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    243. 

  243. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    244. 

  244. </UL>
    245. 

  245. <P><STRONG><a name="[58]"></a>DCMI_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    246. 

  246. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    247. 

  247. </UL>
    248. 

  248. <P><STRONG><a name="[16]"></a>DMA1_Stream1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    249. 

  249. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    250. 

  250. </UL>
    251. 

  251. <P><STRONG><a name="[17]"></a>DMA1_Stream2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    252. 

  252. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    253. 

  253. </UL>
    254. 

  254. <P><STRONG><a name="[19]"></a>DMA1_Stream4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    255. 

  255. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    256. 

  256. </UL>
    257. 

  257. <P><STRONG><a name="[1b]"></a>DMA1_Stream6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    258. 

  258. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    259. 

  259. </UL>
    260. 

  260. <P><STRONG><a name="[39]"></a>DMA1_Stream7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    261. 

  261. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    262. 

  262. </UL>
    263. 

  263. <P><STRONG><a name="[43]"></a>DMA2_Stream1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    264. 

  264. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    265. 

  265. </UL>
    266. 

  266. <P><STRONG><a name="[44]"></a>DMA2_Stream2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    267. 

  267. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    268. 

  268. </UL>
    269. 

  269. <P><STRONG><a name="[45]"></a>DMA2_Stream3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    270. 

  270. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    271. 

  271. </UL>
    272. 

  272. <P><STRONG><a name="[46]"></a>DMA2_Stream4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    273. 

  273. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    274. 

  274. </UL>
    275. 

  275. <P><STRONG><a name="[4e]"></a>DMA2_Stream5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    276. 

  276. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    277. 

  277. </UL>
    278. 

  278. <P><STRONG><a name="[4f]"></a>DMA2_Stream6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    279. 

  279. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    280. 

  280. </UL>
    281. 

  281. <P><STRONG><a name="[50]"></a>DMA2_Stream7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    282. 

  282. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    283. 

  283. </UL>
    284. 

  284. <P><STRONG><a name="[47]"></a>ETH_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    285. 

  285. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    286. 

  286. </UL>
    287. 

  287. <P><STRONG><a name="[48]"></a>ETH_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    288. 

  288. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    289. 

  289. </UL>
    290. 

  290. <P><STRONG><a name="[10]"></a>EXTI0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    291. 

  291. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    292. 

  292. </UL>
    293. 

  293. <P><STRONG><a name="[32]"></a>EXTI15_10_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    294. 

  294. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    295. 

  295. </UL>
    296. 

  296. <P><STRONG><a name="[11]"></a>EXTI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    297. 

  297. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    298. 

  298. </UL>
    299. 

  299. <P><STRONG><a name="[12]"></a>EXTI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    300. 

  300. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    301. 

  301. </UL>
    302. 

  302. <P><STRONG><a name="[13]"></a>EXTI3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    303. 

  303. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    304. 

  304. </UL>
    305. 

  305. <P><STRONG><a name="[14]"></a>EXTI4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    306. 

  306. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    307. 

  307. </UL>
    308. 

  308. <P><STRONG><a name="[21]"></a>EXTI9_5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    309. 

  309. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    310. 

  310. </UL>
    311. 

  311. <P><STRONG><a name="[e]"></a>FLASH_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    312. 

  312. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    313. 

  313. </UL>
    314. 

  314. <P><STRONG><a name="[5b]"></a>FPU_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    315. 

  315. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    316. 

  316. </UL>
    317. 

  317. <P><STRONG><a name="[3a]"></a>FSMC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    318. 

  318. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    319. 

  319. </UL>
    320. 

  320. <P><STRONG><a name="[5a]"></a>HASH_RNG_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    321. 

  321. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    322. 

  322. </UL>
    323. 

  323. <P><STRONG><a name="[2a]"></a>I2C1_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    324. 

  324. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    325. 

  325. </UL>
    326. 

  326. <P><STRONG><a name="[29]"></a>I2C1_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    327. 

  327. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    328. 

  328. </UL>
    329. 

  329. <P><STRONG><a name="[2c]"></a>I2C2_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    330. 

  330. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    331. 

  331. </UL>
    332. 

  332. <P><STRONG><a name="[2b]"></a>I2C2_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    333. 

  333. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    334. 

  334. </UL>
    335. 

  335. <P><STRONG><a name="[53]"></a>I2C3_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    336. 

  336. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    337. 

  337. </UL>
    338. 

  338. <P><STRONG><a name="[52]"></a>I2C3_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    339. 

  339. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    340. 

  340. </UL>
    341. 

  341. <P><STRONG><a name="[4d]"></a>OTG_FS_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    342. 

  342. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    343. 

  343. </UL>
    344. 

  344. <P><STRONG><a name="[34]"></a>OTG_FS_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    345. 

  345. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    346. 

  346. </UL>
    347. 

  347. <P><STRONG><a name="[55]"></a>OTG_HS_EP1_IN_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    348. 

  348. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    349. 

  349. </UL>
    350. 

  350. <P><STRONG><a name="[54]"></a>OTG_HS_EP1_OUT_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    351. 

  351. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    352. 

  352. </UL>
    353. 

  353. <P><STRONG><a name="[57]"></a>OTG_HS_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    354. 

  354. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    355. 

  355. </UL>
    356. 

  356. <P><STRONG><a name="[56]"></a>OTG_HS_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    357. 

  357. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    358. 

  358. </UL>
    359. 

  359. <P><STRONG><a name="[b]"></a>PVD_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    360. 

  360. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    361. 

  361. </UL>
    362. 

  362. <P><STRONG><a name="[f]"></a>RCC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    363. 

  363. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    364. 

  364. </UL>
    365. 

  365. <P><STRONG><a name="[33]"></a>RTC_Alarm_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    366. 

  366. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    367. 

  367. </UL>
    368. 

  368. <P><STRONG><a name="[d]"></a>RTC_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    369. 

  369. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    370. 

  370. </UL>
    371. 

  371. <P><STRONG><a name="[3b]"></a>SDIO_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    372. 

  372. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    373. 

  373. </UL>
    374. 

  374. <P><STRONG><a name="[2d]"></a>SPI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    375. 

  375. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    376. 

  376. </UL>
    377. 

  377. <P><STRONG><a name="[2e]"></a>SPI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    378. 

  378. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    379. 

  379. </UL>
    380. 

  380. <P><STRONG><a name="[3d]"></a>SPI3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    381. 

  381. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    382. 

  382. </UL>
    383. 

  383. <P><STRONG><a name="[c]"></a>TAMP_STAMP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    384. 

  384. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    385. 

  385. </UL>
    386. 

  386. <P><STRONG><a name="[22]"></a>TIM1_BRK_TIM9_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    387. 

  387. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    388. 

  388. </UL>
    389. 

  389. <P><STRONG><a name="[25]"></a>TIM1_CC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    390. 

  390. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    391. 

  391. </UL>
    392. 

  392. <P><STRONG><a name="[24]"></a>TIM1_TRG_COM_TIM11_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    393. 

  393. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    394. 

  394. </UL>
    395. 

  395. <P><STRONG><a name="[26]"></a>TIM2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    396. 

  396. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    397. 

  397. </UL>
    398. 

  398. <P><STRONG><a name="[27]"></a>TIM3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    399. 

  399. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    400. 

  400. </UL>
    401. 

  401. <P><STRONG><a name="[28]"></a>TIM4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    402. 

  402. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    403. 

  403. </UL>
    404. 

  404. <P><STRONG><a name="[3c]"></a>TIM5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    405. 

  405. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    406. 

  406. </UL>
    407. 

  407. <P><STRONG><a name="[40]"></a>TIM6_DAC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    408. 

  408. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    409. 

  409. </UL>
    410. 

  410. <P><STRONG><a name="[41]"></a>TIM7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    411. 

  411. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    412. 

  412. </UL>
    413. 

  413. <P><STRONG><a name="[35]"></a>TIM8_BRK_TIM12_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    414. 

  414. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    415. 

  415. </UL>
    416. 

  416. <P><STRONG><a name="[38]"></a>TIM8_CC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    417. 

  417. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    418. 

  418. </UL>
    419. 

  419. <P><STRONG><a name="[37]"></a>TIM8_TRG_COM_TIM14_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    420. 

  420. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    421. 

  421. </UL>
    422. 

  422. <P><STRONG><a name="[36]"></a>TIM8_UP_TIM13_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    423. 

  423. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    424. 

  424. </UL>
    425. 

  425. <P><STRONG><a name="[3e]"></a>UART4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    426. 

  426. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    427. 

  427. </UL>
    428. 

  428. <P><STRONG><a name="[2f]"></a>USART1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    429. 

  429. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    430. 

  430. </UL>
    431. 

  431. <P><STRONG><a name="[a]"></a>WWDG_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    432. 

  432. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    433. 

  433. </UL>
    434. 

  434. <P><STRONG><a name="[67]"></a>__aeabi_dadd</STRONG> (Thumb, 322 bytes, Stack size 48 bytes, dadd.o(.text))
    435. 

  435. <BR><BR>[Stack]<UL><LI>Max Depth = 88<LI>Call Chain = __aeabi_dadd &rArr; _double_epilogue &rArr; _double_round
    436. 

  436. </UL>
    437. 

  437. <BR>[Calls]<UL><LI><a href="#[69]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_lasr
    438. 

  438. <LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsl
    439. 

  439. <LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_round
    440. 

  440. <LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
    441. 

  441. </UL>
    442. 

  442. <BR>[Called By]<UL><LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dsub
    443. 

  443. <LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_drsub
    444. 

  444. <LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_Temperature
    445. 

  445. <LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Rec_Flash_Set
    446. 

  446. </UL>
    447. 

  447. 

  448. <P><STRONG><a name="[6c]"></a>__aeabi_dsub</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, dadd.o(.text), UNUSED)
    449. 

  449. <BR><BR>[Calls]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
    450. 

  450. </UL>
    451. 

  451. 

  452. <P><STRONG><a name="[6d]"></a>__aeabi_drsub</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, dadd.o(.text))
    453. 

  453. <BR><BR>[Stack]<UL><LI>Max Depth = 88<LI>Call Chain = __aeabi_drsub &rArr; __aeabi_dadd &rArr; _double_epilogue &rArr; _double_round
    454. 

  454. </UL>
    455. 

  455. <BR>[Calls]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
    456. 

  456. </UL>
    457. 

  457. <BR>[Called By]<UL><LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_Temperature
    458. 

  458. </UL>
    459. 

  459. 

  460. <P><STRONG><a name="[6e]"></a>__aeabi_dmul</STRONG> (Thumb, 228 bytes, Stack size 48 bytes, dmul.o(.text))
    461. 

  461. <BR><BR>[Stack]<UL><LI>Max Depth = 88<LI>Call Chain = __aeabi_dmul &rArr; _double_epilogue &rArr; _double_round
    462. 

  462. </UL>
    463. 

  463. <BR>[Calls]<UL><LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
    464. 

  464. </UL>
    465. 

  465. <BR>[Called By]<UL><LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GetDShotValue
    466. 

  466. <LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AnaMotorData
    467. 

  467. <LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_Temperature
    468. 

  468. <LI><a href="#[42]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA2_Stream0_IRQHandler
    469. 

  469. <LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Rec_Flash_Set
    470. 

  470. </UL>
    471. 

  471. 

  472. <P><STRONG><a name="[6f]"></a>__aeabi_ddiv</STRONG> (Thumb, 222 bytes, Stack size 32 bytes, ddiv.o(.text))
    473. 

  473. <BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = __aeabi_ddiv &rArr; _double_round
    474. 

  474. </UL>
    475. 

  475. <BR>[Calls]<UL><LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_round
    476. 

  476. </UL>
    477. 

  477. <BR>[Called By]<UL><LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_Temperature
    478. 

  478. <LI><a href="#[42]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA2_Stream0_IRQHandler
    479. 

  479. </UL>
    480. 

  480. 

  481. <P><STRONG><a name="[70]"></a>__aeabi_i2d</STRONG> (Thumb, 34 bytes, Stack size 16 bytes, dflti.o(.text))
    482. 

  482. <BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = __aeabi_i2d &rArr; _double_epilogue &rArr; _double_round
    483. 

  483. </UL>
    484. 

  484. <BR>[Calls]<UL><LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
    485. 

  485. </UL>
    486. 

  486. <BR>[Called By]<UL><LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GetDShotValue
    487. 

  487. <LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Rec_Flash_Set
    488. 

  488. </UL>
    489. 

  489. 

  490. <P><STRONG><a name="[71]"></a>__aeabi_ui2d</STRONG> (Thumb, 26 bytes, Stack size 16 bytes, dfltui.o(.text))
    491. 

  491. <BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = __aeabi_ui2d &rArr; _double_epilogue &rArr; _double_round
    492. 

  492. </UL>
    493. 

  493. <BR>[Calls]<UL><LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
    494. 

  494. </UL>
    495. 

  495. <BR>[Called By]<UL><LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AnaMotorData
    496. 

  496. <LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_Temperature
    497. 

  497. <LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Rec_Flash_Set
    498. 

  498. </UL>
    499. 

  499. 

  500. <P><STRONG><a name="[72]"></a>__aeabi_d2iz</STRONG> (Thumb, 62 bytes, Stack size 16 bytes, dfixi.o(.text))
    501. 

  501. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = __aeabi_d2iz
    502. 

  502. </UL>
    503. 

  503. <BR>[Calls]<UL><LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsr
    504. 

  504. </UL>
    505. 

  505. <BR>[Called By]<UL><LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GetDShotValue
    506. 

  506. </UL>
    507. 

  507. 

  508. <P><STRONG><a name="[74]"></a>__aeabi_d2uiz</STRONG> (Thumb, 50 bytes, Stack size 8 bytes, dfixui.o(.text))
    509. 

  509. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = __aeabi_d2uiz
    510. 

  510. </UL>
    511. 

  511. <BR>[Calls]<UL><LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsr
    512. 

  512. </UL>
    513. 

  513. <BR>[Called By]<UL><LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AnaMotorData
    514. 

  514. </UL>
    515. 

  515. 

  516. <P><STRONG><a name="[ae]"></a>__aeabi_f2d</STRONG> (Thumb, 38 bytes, Stack size 0 bytes, f2d.o(.text))
    517. 

  517. <BR><BR>[Called By]<UL><LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_Temperature
    518. 

  518. <LI><a href="#[42]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA2_Stream0_IRQHandler
    519. 

  519. </UL>
    520. 

  520. 

  521. <P><STRONG><a name="[75]"></a>__aeabi_d2f</STRONG> (Thumb, 56 bytes, Stack size 8 bytes, d2f.o(.text))
    522. 

  522. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = __aeabi_d2f
    523. 

  523. </UL>
    524. 

  524. <BR>[Calls]<UL><LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_float_round
    525. 

  525. </UL>
    526. 

  526. <BR>[Called By]<UL><LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_Temperature
    527. 

  527. <LI><a href="#[42]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA2_Stream0_IRQHandler
    528. 

  528. <LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Rec_Flash_Set
    529. 

  529. </UL>
    530. 

  530. 

  531. <P><STRONG><a name="[68]"></a>__aeabi_llsl</STRONG> (Thumb, 30 bytes, Stack size 0 bytes, llshl.o(.text))
    532. 

  532. <BR><BR>[Called By]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
    533. 

  533. <LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
    534. 

  534. </UL>
    535. 

  535. 

  536. <P><STRONG><a name="[105]"></a>_ll_shift_l</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, llshl.o(.text), UNUSED)
    537. 

  537. 

  538. <P><STRONG><a name="[73]"></a>__aeabi_llsr</STRONG> (Thumb, 32 bytes, Stack size 0 bytes, llushr.o(.text))
    539. 

  539. <BR><BR>[Called By]<UL><LI><a href="#[74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_d2uiz
    540. 

  540. <LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_d2iz
    541. 

  541. <LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
    542. 

  542. </UL>
    543. 

  543. 

  544. <P><STRONG><a name="[106]"></a>_ll_ushift_r</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, llushr.o(.text), UNUSED)
    545. 

  545. 

  546. <P><STRONG><a name="[69]"></a>__aeabi_lasr</STRONG> (Thumb, 36 bytes, Stack size 0 bytes, llsshr.o(.text))
    547. 

  547. <BR><BR>[Called By]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
    548. 

  548. </UL>
    549. 

  549. 

  550. <P><STRONG><a name="[107]"></a>_ll_sshift_r</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, llsshr.o(.text), UNUSED)
    551. 

  551. 

  552. <P><STRONG><a name="[108]"></a>__I$use$fp</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, iusefp.o(.text), UNUSED)
    553. 

  553. 

  554. <P><STRONG><a name="[76]"></a>_float_round</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, fepilogue.o(.text))
    555. 

  555. <BR><BR>[Called By]<UL><LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_d2f
    556. 

  556. </UL>
    557. 

  557. 

  558. <P><STRONG><a name="[109]"></a>_float_epilogue</STRONG> (Thumb, 92 bytes, Stack size 4 bytes, fepilogue.o(.text), UNUSED)
    559. 

  559. 

  560. <P><STRONG><a name="[6b]"></a>_double_round</STRONG> (Thumb, 30 bytes, Stack size 8 bytes, depilogue.o(.text))
    561. 

  561. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = _double_round
    562. 

  562. </UL>
    563. 

  563. <BR>[Called By]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
    564. 

  564. <LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_ddiv
    565. 

  565. <LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
    566. 

  566. </UL>
    567. 

  567. 

  568. <P><STRONG><a name="[6a]"></a>_double_epilogue</STRONG> (Thumb, 156 bytes, Stack size 32 bytes, depilogue.o(.text))
    569. 

  569. <BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = _double_epilogue &rArr; _double_round
    570. 

  570. </UL>
    571. 

  571. <BR>[Calls]<UL><LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsr
    572. 

  572. <LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsl
    573. 

  573. <LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_round
    574. 

  574. </UL>
    575. 

  575. <BR>[Called By]<UL><LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_ui2d
    576. 

  576. <LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_i2d
    577. 

  577. <LI><a href="#[6e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dmul
    578. 

  578. <LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
    579. 

  579. </UL>
    580. 

  580. 

  581. <P><STRONG><a name="[66]"></a>__scatterload</STRONG> (Thumb, 28 bytes, Stack size 0 bytes, init.o(.text))
    582. 

  582. <BR><BR>[Calls]<UL><LI><a href="#[77]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__main_after_scatterload
    583. 

  583. </UL>
    584. 

  584. <BR>[Called By]<UL><LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_main_scatterload
    585. 

  585. </UL>
    586. 

  586. 

  587. <P><STRONG><a name="[10a]"></a>__scatterload_rt2</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, init.o(.text), UNUSED)
    588. 

  588. 

  589. <P><STRONG><a name="[8c]"></a>ADC_Cmd</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, stm32f4xx_adc.o(i.ADC_Cmd))
    590. 

  590. <BR><BR>[Called By]<UL><LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_SOFT_Mode_Config
    591. 

  591. <LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_DMA_Mode_Config
    592. 

  592. </UL>
    593. 

  593. 

  594. <P><STRONG><a name="[87]"></a>ADC_CommonInit</STRONG> (Thumb, 34 bytes, Stack size 8 bytes, stm32f4xx_adc.o(i.ADC_CommonInit))
    595. 

  595. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = ADC_CommonInit
    596. 

  596. </UL>
    597. 

  597. <BR>[Called By]<UL><LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_SOFT_Mode_Config
    598. 

  598. <LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_DMA_Mode_Config
    599. 

  599. </UL>
    600. 

  600. 

  601. <P><STRONG><a name="[78]"></a>ADC_Config</STRONG> (Thumb, 128 bytes, Stack size 24 bytes, main.o(i.ADC_Config))
    602. 

  602. <BR><BR>[Stack]<UL><LI>Max Depth = 116<LI>Call Chain = ADC_Config &rArr; ADC_DMA_Config &rArr; DMA_Init
    603. 

  603. </UL>
    604. 

  604. <BR>[Calls]<UL><LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_TIM_Config
    605. 

  605. <LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_SOFT_Mode_Config
    606. 

  606. <LI><a href="#[7c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_NVIC_Config
    607. 

  607. <LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_GPIO_Config
    608. 

  608. <LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_DMA_Mode_Config
    609. 

  609. <LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_DMA_Config
    610. 

  610. </UL>
    611. 

  611. <BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    612. 

  612. </UL>
    613. 

  613. 

  614. <P><STRONG><a name="[8b]"></a>ADC_DMACmd</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, stm32f4xx_adc.o(i.ADC_DMACmd))
    615. 

  615. <BR><BR>[Called By]<UL><LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_DMA_Mode_Config
    616. 

  616. </UL>
    617. 

  617. 

  618. <P><STRONG><a name="[8a]"></a>ADC_DMARequestAfterLastTransferCmd</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, stm32f4xx_adc.o(i.ADC_DMARequestAfterLastTransferCmd))
    619. 

  619. <BR><BR>[Called By]<UL><LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_DMA_Mode_Config
    620. 

  620. </UL>
    621. 

  621. 

  622. <P><STRONG><a name="[7d]"></a>ADC_DMA_Config</STRONG> (Thumb, 122 bytes, Stack size 80 bytes, adc.o(i.ADC_DMA_Config))
    623. 

  623. <BR><BR>[Stack]<UL><LI>Max Depth = 92<LI>Call Chain = ADC_DMA_Config &rArr; DMA_Init
    624. 

  624. </UL>
    625. 

  625. <BR>[Calls]<UL><LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_DoubleBufferModeConfig
    626. 

  626. <LI><a href="#[82]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_DoubleBufferModeCmd
    627. 

  627. <LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_AHB1PeriphClockCmd
    628. 

  628. <LI><a href="#[80]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_Init
    629. 

  629. <LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_ITConfig
    630. 

  630. <LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_Cmd
    631. 

  631. <LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_ClearITPendingBit
    632. 

  632. </UL>
    633. 

  633. <BR>[Called By]<UL><LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_Config
    634. 

  634. </UL>
    635. 

  635. 

  636. <P><STRONG><a name="[7b]"></a>ADC_DMA_Mode_Config</STRONG> (Thumb, 142 bytes, Stack size 64 bytes, adc.o(i.ADC_DMA_Mode_Config))
    637. 

  637. <BR><BR>[Stack]<UL><LI>Max Depth = 80<LI>Call Chain = ADC_DMA_Mode_Config &rArr; ADC_RegularChannelConfig
    638. 

  638. </UL>
    639. 

  639. <BR>[Calls]<UL><LI><a href="#[86]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_APB2PeriphResetCmd
    640. 

  640. <LI><a href="#[89]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_RegularChannelConfig
    641. 

  641. <LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_Init
    642. 

  642. <LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_DMARequestAfterLastTransferCmd
    643. 

  643. <LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_DMACmd
    644. 

  644. <LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_CommonInit
    645. 

  645. <LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_Cmd
    646. 

  646. <LI><a href="#[64]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_APB2PeriphClockCmd
    647. 

  647. </UL>
    648. 

  648. <BR>[Called By]<UL><LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_Config
    649. 

  649. </UL>
    650. 

  650. 

  651. <P><STRONG><a name="[79]"></a>ADC_GPIO_Config</STRONG> (Thumb, 36 bytes, Stack size 24 bytes, adc.o(i.ADC_GPIO_Config))
    652. 

  652. <BR><BR>[Stack]<UL><LI>Max Depth = 44<LI>Call Chain = ADC_GPIO_Config &rArr; GPIO_Init
    653. 

  653. </UL>
    654. 

  654. <BR>[Calls]<UL><LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_AHB1PeriphClockCmd
    655. 

  655. <LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_Init
    656. 

  656. </UL>
    657. 

  657. <BR>[Called By]<UL><LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_Config
    658. 

  658. </UL>
    659. 

  659. 

  660. <P><STRONG><a name="[cb]"></a>ADC_GetConversionValue</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32f4xx_adc.o(i.ADC_GetConversionValue))
    661. 

  661. <BR><BR>[Called By]<UL><LI><a href="#[c8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_SOFT_ADC
    662. 

  662. </UL>
    663. 

  663. 

  664. <P><STRONG><a name="[ca]"></a>ADC_GetFlagStatus</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, stm32f4xx_adc.o(i.ADC_GetFlagStatus))
    665. 

  665. <BR><BR>[Called By]<UL><LI><a href="#[c8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_SOFT_ADC
    666. 

  666. </UL>
    667. 

  667. 

  668. <P><STRONG><a name="[88]"></a>ADC_Init</STRONG> (Thumb, 66 bytes, Stack size 12 bytes, stm32f4xx_adc.o(i.ADC_Init))
    669. 

  669. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = ADC_Init
    670. 

  670. </UL>
    671. 

  671. <BR>[Called By]<UL><LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_SOFT_Mode_Config
    672. 

  672. <LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_DMA_Mode_Config
    673. 

  673. </UL>
    674. 

  674. 

  675. <P><STRONG><a name="[7c]"></a>ADC_NVIC_Config</STRONG> (Thumb, 28 bytes, Stack size 8 bytes, adc.o(i.ADC_NVIC_Config))
    676. 

  676. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = ADC_NVIC_Config &rArr; NVIC_Init
    677. 

  677. </UL>
    678. 

  678. <BR>[Calls]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NVIC_Init
    679. 

  679. </UL>
    680. 

  680. <BR>[Called By]<UL><LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_Config
    681. 

  681. </UL>
    682. 

  682. 

  683. <P><STRONG><a name="[89]"></a>ADC_RegularChannelConfig</STRONG> (Thumb, 116 bytes, Stack size 16 bytes, stm32f4xx_adc.o(i.ADC_RegularChannelConfig))
    684. 

  684. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = ADC_RegularChannelConfig
    685. 

  685. </UL>
    686. 

  686. <BR>[Called By]<UL><LI><a href="#[c8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_SOFT_ADC
    687. 

  687. <LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_DMA_Mode_Config
    688. 

  688. </UL>
    689. 

  689. 

  690. <P><STRONG><a name="[7a]"></a>ADC_SOFT_Mode_Config</STRONG> (Thumb, 90 bytes, Stack size 56 bytes, adc.o(i.ADC_SOFT_Mode_Config))
    691. 

  691. <BR><BR>[Stack]<UL><LI>Max Depth = 68<LI>Call Chain = ADC_SOFT_Mode_Config &rArr; ADC_Init
    692. 

  692. </UL>
    693. 

  693. <BR>[Calls]<UL><LI><a href="#[86]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_APB2PeriphResetCmd
    694. 

  694. <LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_Init
    695. 

  695. <LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_CommonInit
    696. 

  696. <LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_Cmd
    697. 

  697. <LI><a href="#[64]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_APB2PeriphClockCmd
    698. 

  698. </UL>
    699. 

  699. <BR>[Called By]<UL><LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_Config
    700. 

  700. </UL>
    701. 

  701. 

  702. <P><STRONG><a name="[c9]"></a>ADC_SoftwareStartConv</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, stm32f4xx_adc.o(i.ADC_SoftwareStartConv))
    703. 

  703. <BR><BR>[Called By]<UL><LI><a href="#[c8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_SOFT_ADC
    704. 

  704. </UL>
    705. 

  705. 

  706. <P><STRONG><a name="[7e]"></a>ADC_TIM_Config</STRONG> (Thumb, 114 bytes, Stack size 56 bytes, adc.o(i.ADC_TIM_Config))
    707. 

  707. <BR><BR>[Stack]<UL><LI>Max Depth = 68<LI>Call Chain = ADC_TIM_Config &rArr; TIM_TimeBaseInit
    708. 

  708. </UL>
    709. 

  709. <BR>[Calls]<UL><LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_CtrlPWMOutputs
    710. 

  710. <LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_TimeBaseInit
    711. 

  711. <LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_SelectOutputTrigger
    712. 

  712. <LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_Cmd
    713. 

  713. </UL>
    714. 

  714. <BR>[Called By]<UL><LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_Config
    715. 

  715. </UL>
    716. 

  716. 

  717. <P><STRONG><a name="[93]"></a>All_motor_Config</STRONG> (Thumb, 118 bytes, Stack size 4 bytes, main.o(i.All_motor_Config))
    718. 

  718. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = All_motor_Config
    719. 

  719. </UL>
    720. 

  720. <BR>[Calls]<UL><LI><a href="#[94]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Single_Motor_Config
    721. 

  721. </UL>
    722. 

  722. <BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    723. 

  723. </UL>
    724. 

  724. 

  725. <P><STRONG><a name="[95]"></a>AnaMotorData</STRONG> (Thumb, 148 bytes, Stack size 8 bytes, main.o(i.AnaMotorData))
    726. 

  726. <BR><BR>[Stack]<UL><LI>Max Depth = 96<LI>Call Chain = AnaMotorData &rArr; __aeabi_dmul &rArr; _double_epilogue &rArr; _double_round
    727. 

  727. </UL>
    728. 

  728. <BR>[Calls]<UL><LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_ui2d
    729. 

  729. <LI><a href="#[6e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dmul
    730. 

  730. <LI><a href="#[74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_d2uiz
    731. 

  731. <LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;get_crc8
    732. 

  732. <LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Equation
    733. 

  733. </UL>
    734. 

  734. <BR>[Called By]<UL><LI><a href="#[51]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART6_IRQHandler
    735. 

  735. <LI><a href="#[31]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART3_IRQHandler
    736. 

  736. <LI><a href="#[30]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART2_IRQHandler
    737. 

  737. <LI><a href="#[3f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART5_IRQHandler
    738. 

  738. </UL>
    739. 

  739. 

  740. <P><STRONG><a name="[1e]"></a>CAN1_RX0_IRQHandler</STRONG> (Thumb, 576 bytes, Stack size 48 bytes, it.o(i.CAN1_RX0_IRQHandler))
    741. 

  741. <BR><BR>[Stack]<UL><LI>Max Depth = 168<LI>Call Chain = CAN1_RX0_IRQHandler &rArr; Rec_Flash_Set &rArr; __aeabi_dmul &rArr; _double_epilogue &rArr; _double_round
    742. 

  742. </UL>
    743. 

  743. <BR>[Calls]<UL><LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IWDG_Feed
    744. 

  744. <LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_ReadInputDataBit
    745. 

  745. <LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SoftReset
    746. 

  746. <LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GetDShotValue
    747. 

  747. <LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ResearchProtection
    748. 

  748. <LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Rec_Flash_Set
    749. 

  749. <LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_Receive_Msg
    750. 

  750. </UL>
    751. 

  751. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    752. 

  752. </UL>
    753. 

  753. <P><STRONG><a name="[98]"></a>CAN1_Receive_Msg</STRONG> (Thumb, 64 bytes, Stack size 40 bytes, can.o(i.CAN1_Receive_Msg))
    754. 

  754. <BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = CAN1_Receive_Msg &rArr; CAN_Receive
    755. 

  755. </UL>
    756. 

  756. <BR>[Calls]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_Receive
    757. 

  757. <LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_MessagePending
    758. 

  758. </UL>
    759. 

  759. <BR>[Called By]<UL><LI><a href="#[1e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_RX0_IRQHandler
    760. 

  760. </UL>
    761. 

  761. 

  762. <P><STRONG><a name="[a1]"></a>CAN1_Send_Msg</STRONG> (Thumb, 92 bytes, Stack size 40 bytes, can.o(i.CAN1_Send_Msg))
    763. 

  763. <BR><BR>[Stack]<UL><LI>Max Depth = 52<LI>Call Chain = CAN1_Send_Msg &rArr; CAN_Transmit
    764. 

  764. </UL>
    765. 

  765. <BR>[Calls]<UL><LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_TransmitStatus
    766. 

  766. <LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_Transmit
    767. 

  767. </UL>
    768. 

  768. <BR>[Called By]<UL><LI><a href="#[e1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_Flash_Set
    769. 

  769. <LI><a href="#[e0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_CAN_DATA6
    770. 

  770. <LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_CAN_DATA5
    771. 

  771. <LI><a href="#[de]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_CAN_DATA4
    772. 

  772. <LI><a href="#[dd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_CAN_DATA3
    773. 

  773. <LI><a href="#[dc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_CAN_DATA2
    774. 

  774. <LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_CAN_DATA1
    775. 

  775. </UL>
    776. 

  776. 

  777. <P><STRONG><a name="[a4]"></a>CAN_Config</STRONG> (Thumb, 64 bytes, Stack size 16 bytes, main.o(i.CAN_Config))
    778. 

  778. <BR><BR>[Stack]<UL><LI>Max Depth = 92<LI>Call Chain = CAN_Config &rArr; CAN_Mod_Config &rArr; CAN_FilterInit
    779. 

  779. </UL>
    780. 

  780. <BR>[Calls]<UL><LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_NVIC_Config
    781. 

  781. <LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_Mod_Config
    782. 

  782. <LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_GPIO_Config
    783. 

  783. </UL>
    784. 

  784. <BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    785. 

  785. </UL>
    786. 

  786. 

  787. <P><STRONG><a name="[aa]"></a>CAN_FilterInit</STRONG> (Thumb, 194 bytes, Stack size 20 bytes, stm32f4xx_can.o(i.CAN_FilterInit))
    788. 

  788. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = CAN_FilterInit
    789. 

  789. </UL>
    790. 

  790. <BR>[Called By]<UL><LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_Mod_Config
    791. 

  791. </UL>
    792. 

  792. 

  793. <P><STRONG><a name="[a5]"></a>CAN_GPIO_Config</STRONG> (Thumb, 66 bytes, Stack size 32 bytes, can.o(i.CAN_GPIO_Config))
    794. 

  794. <BR><BR>[Stack]<UL><LI>Max Depth = 52<LI>Call Chain = CAN_GPIO_Config &rArr; GPIO_Init
    795. 

  795. </UL>
    796. 

  796. <BR>[Calls]<UL><LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_AHB1PeriphClockCmd
    797. 

  797. <LI><a href="#[a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_PinAFConfig
    798. 

  798. <LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_Init
    799. 

  799. </UL>
    800. 

  800. <BR>[Called By]<UL><LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_Config
    801. 

  801. </UL>
    802. 

  802. 

  803. <P><STRONG><a name="[ab]"></a>CAN_ITConfig</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, stm32f4xx_can.o(i.CAN_ITConfig))
    804. 

  804. <BR><BR>[Called By]<UL><LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_Mod_Config
    805. 

  805. </UL>
    806. 

  806. 

  807. <P><STRONG><a name="[a9]"></a>CAN_Init</STRONG> (Thumb, 232 bytes, Stack size 8 bytes, stm32f4xx_can.o(i.CAN_Init))
    808. 

  808. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = CAN_Init
    809. 

  809. </UL>
    810. 

  810. <BR>[Called By]<UL><LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_Mod_Config
    811. 

  811. </UL>
    812. 

  812. 

  813. <P><STRONG><a name="[9f]"></a>CAN_MessagePending</STRONG> (Thumb, 22 bytes, Stack size 0 bytes, stm32f4xx_can.o(i.CAN_MessagePending))
    814. 

  814. <BR><BR>[Called By]<UL><LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_Receive_Msg
    815. 

  815. </UL>
    816. 

  816. 

  817. <P><STRONG><a name="[a7]"></a>CAN_Mod_Config</STRONG> (Thumb, 158 bytes, Stack size 56 bytes, can.o(i.CAN_Mod_Config))
    818. 

  818. <BR><BR>[Stack]<UL><LI>Max Depth = 76<LI>Call Chain = CAN_Mod_Config &rArr; CAN_FilterInit
    819. 

  819. </UL>
    820. 

  820. <BR>[Calls]<UL><LI><a href="#[61]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_APB1PeriphClockCmd
    821. 

  821. <LI><a href="#[a9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_Init
    822. 

  822. <LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_ITConfig
    823. 

  823. <LI><a href="#[aa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_FilterInit
    824. 

  824. </UL>
    825. 

  825. <BR>[Called By]<UL><LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_Config
    826. 

  826. </UL>
    827. 

  827. 

  828. <P><STRONG><a name="[a6]"></a>CAN_NVIC_Config</STRONG> (Thumb, 28 bytes, Stack size 8 bytes, can.o(i.CAN_NVIC_Config))
    829. 

  829. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = CAN_NVIC_Config &rArr; NVIC_Init
    830. 

  830. </UL>
    831. 

  831. <BR>[Calls]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NVIC_Init
    832. 

  832. </UL>
    833. 

  833. <BR>[Called By]<UL><LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_Config
    834. 

  834. </UL>
    835. 

  835. 

  836. <P><STRONG><a name="[a0]"></a>CAN_Receive</STRONG> (Thumb, 142 bytes, Stack size 8 bytes, stm32f4xx_can.o(i.CAN_Receive))
    837. 

  837. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = CAN_Receive
    838. 

  838. </UL>
    839. 

  839. <BR>[Called By]<UL><LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_Receive_Msg
    840. 

  840. </UL>
    841. 

  841. 

  842. <P><STRONG><a name="[a2]"></a>CAN_Transmit</STRONG> (Thumb, 164 bytes, Stack size 12 bytes, stm32f4xx_can.o(i.CAN_Transmit))
    843. 

  843. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = CAN_Transmit
    844. 

  844. </UL>
    845. 

  845. <BR>[Called By]<UL><LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_Send_Msg
    846. 

  846. </UL>
    847. 

  847. 

  848. <P><STRONG><a name="[a3]"></a>CAN_TransmitStatus</STRONG> (Thumb, 88 bytes, Stack size 0 bytes, stm32f4xx_can.o(i.CAN_TransmitStatus))
    849. 

  849. <BR><BR>[Called By]<UL><LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_Send_Msg
    850. 

  850. </UL>
    851. 

  851. 

  852. <P><STRONG><a name="[15]"></a>DMA1_Stream0_IRQHandler</STRONG> (Thumb, 40 bytes, Stack size 16 bytes, it.o(i.DMA1_Stream0_IRQHandler))
    853. 

  853. <BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = DMA1_Stream0_IRQHandler &rArr; DMA_GetITStatus
    854. 

  854. </UL>
    855. 

  855. <BR>[Calls]<UL><LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_Cmd
    856. 

  856. <LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_ClearITPendingBit
    857. 

  857. <LI><a href="#[ac]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_GetITStatus
    858. 

  858. </UL>
    859. 

  859. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    860. 

  860. </UL>
    861. 

  861. <P><STRONG><a name="[18]"></a>DMA1_Stream3_IRQHandler</STRONG> (Thumb, 40 bytes, Stack size 16 bytes, it.o(i.DMA1_Stream3_IRQHandler))
    862. 

  862. <BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = DMA1_Stream3_IRQHandler &rArr; DMA_GetITStatus
    863. 

  863. </UL>
    864. 

  864. <BR>[Calls]<UL><LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_Cmd
    865. 

  865. <LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_ClearITPendingBit
    866. 

  866. <LI><a href="#[ac]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_GetITStatus
    867. 

  867. </UL>
    868. 

  868. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    869. 

  869. </UL>
    870. 

  870. <P><STRONG><a name="[1a]"></a>DMA1_Stream5_IRQHandler</STRONG> (Thumb, 40 bytes, Stack size 16 bytes, it.o(i.DMA1_Stream5_IRQHandler))
    871. 

  871. <BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = DMA1_Stream5_IRQHandler &rArr; DMA_GetITStatus
    872. 

  872. </UL>
    873. 

  873. <BR>[Calls]<UL><LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_Cmd
    874. 

  874. <LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_ClearITPendingBit
    875. 

  875. <LI><a href="#[ac]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_GetITStatus
    876. 

  876. </UL>
    877. 

  877. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    878. 

  878. </UL>
    879. 

  879. <P><STRONG><a name="[42]"></a>DMA2_Stream0_IRQHandler</STRONG> (Thumb, 186 bytes, Stack size 24 bytes, it.o(i.DMA2_Stream0_IRQHandler))
    880. 

  880. <BR><BR>[Stack]<UL><LI>Max Depth = 144<LI>Call Chain = DMA2_Stream0_IRQHandler &rArr; Get_Temperature &rArr; __aeabi_dmul &rArr; _double_epilogue &rArr; _double_round
    881. 

  881. </UL>
    882. 

  882. <BR>[Calls]<UL><LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_ClearITPendingBit
    883. 

  883. <LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_f2d
    884. 

  884. <LI><a href="#[6e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dmul
    885. 

  885. <LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_ddiv
    886. 

  886. <LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_Temperature
    887. 

  887. <LI><a href="#[ac]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_GetITStatus
    888. 

  888. <LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_GetCurrentMemoryTarget
    889. 

  889. <LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_d2f
    890. 

  890. </UL>
    891. 

  891. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    892. 

  892. </UL>
    893. 

  893. <P><STRONG><a name="[83]"></a>DMA_ClearITPendingBit</STRONG> (Thumb, 32 bytes, Stack size 0 bytes, stm32f4xx_dma.o(i.DMA_ClearITPendingBit))
    894. 

  894. <BR><BR>[Called By]<UL><LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DSHOT_DMA_Config
    895. 

  895. <LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_DMA_Config
    896. 

  896. <LI><a href="#[42]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA2_Stream0_IRQHandler
    897. 

  897. <LI><a href="#[1a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA1_Stream5_IRQHandler
    898. 

  898. <LI><a href="#[18]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA1_Stream3_IRQHandler
    899. 

  899. <LI><a href="#[15]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA1_Stream0_IRQHandler
    900. 

  900. </UL>
    901. 

  901. 

  902. <P><STRONG><a name="[85]"></a>DMA_Cmd</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, stm32f4xx_dma.o(i.DMA_Cmd))
    903. 

  903. <BR><BR>[Called By]<UL><LI><a href="#[ed]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pwmWriteDigital
    904. 

  904. <LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DSHOT_DMA_Config
    905. 

  905. <LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_DMA_Config
    906. 

  906. <LI><a href="#[1a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA1_Stream5_IRQHandler
    907. 

  907. <LI><a href="#[18]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA1_Stream3_IRQHandler
    908. 

  908. <LI><a href="#[15]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA1_Stream0_IRQHandler
    909. 

  909. </UL>
    910. 

  910. 

  911. <P><STRONG><a name="[b1]"></a>DMA_DeInit</STRONG> (Thumb, 272 bytes, Stack size 28 bytes, stm32f4xx_dma.o(i.DMA_DeInit))
    912. 

  912. <BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = DMA_DeInit
    913. 

  913. </UL>
    914. 

  914. <BR>[Called By]<UL><LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DSHOT_DMA_Config
    915. 

  915. </UL>
    916. 

  916. 

  917. <P><STRONG><a name="[82]"></a>DMA_DoubleBufferModeCmd</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, stm32f4xx_dma.o(i.DMA_DoubleBufferModeCmd))
    918. 

  918. <BR><BR>[Called By]<UL><LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_DMA_Config
    919. 

  919. </UL>
    920. 

  920. 

  921. <P><STRONG><a name="[81]"></a>DMA_DoubleBufferModeConfig</STRONG> (Thumb, 22 bytes, Stack size 0 bytes, stm32f4xx_dma.o(i.DMA_DoubleBufferModeConfig))
    922. 

  922. <BR><BR>[Called By]<UL><LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_DMA_Config
    923. 

  923. </UL>
    924. 

  924. 

  925. <P><STRONG><a name="[b2]"></a>DMA_GetCmdStatus</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, stm32f4xx_dma.o(i.DMA_GetCmdStatus))
    926. 

  926. <BR><BR>[Called By]<UL><LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DSHOT_DMA_Config
    927. 

  927. </UL>
    928. 

  928. 

  929. <P><STRONG><a name="[ad]"></a>DMA_GetCurrentMemoryTarget</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, stm32f4xx_dma.o(i.DMA_GetCurrentMemoryTarget))
    930. 

  930. <BR><BR>[Called By]<UL><LI><a href="#[42]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA2_Stream0_IRQHandler
    931. 

  931. </UL>
    932. 

  932. 

  933. <P><STRONG><a name="[ac]"></a>DMA_GetITStatus</STRONG> (Thumb, 68 bytes, Stack size 12 bytes, stm32f4xx_dma.o(i.DMA_GetITStatus))
    934. 

  934. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = DMA_GetITStatus
    935. 

  935. </UL>
    936. 

  936. <BR>[Called By]<UL><LI><a href="#[42]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA2_Stream0_IRQHandler
    937. 

  937. <LI><a href="#[1a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA1_Stream5_IRQHandler
    938. 

  938. <LI><a href="#[18]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA1_Stream3_IRQHandler
    939. 

  939. <LI><a href="#[15]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA1_Stream0_IRQHandler
    940. 

  940. </UL>
    941. 

  941. 

  942. <P><STRONG><a name="[84]"></a>DMA_ITConfig</STRONG> (Thumb, 44 bytes, Stack size 0 bytes, stm32f4xx_dma.o(i.DMA_ITConfig))
    943. 

  943. <BR><BR>[Called By]<UL><LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DSHOT_DMA_Config
    944. 

  944. <LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_DMA_Config
    945. 

  945. </UL>
    946. 

  946. 

  947. <P><STRONG><a name="[80]"></a>DMA_Init</STRONG> (Thumb, 80 bytes, Stack size 12 bytes, stm32f4xx_dma.o(i.DMA_Init))
    948. 

  948. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = DMA_Init
    949. 

  949. </UL>
    950. 

  950. <BR>[Called By]<UL><LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DSHOT_DMA_Config
    951. 

  951. <LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_DMA_Config
    952. 

  952. </UL>
    953. 

  953. 

  954. <P><STRONG><a name="[b0]"></a>DSHOT_DMA_Config</STRONG> (Thumb, 140 bytes, Stack size 88 bytes, dshot.o(i.DSHOT_DMA_Config))
    955. 

  955. <BR><BR>[Stack]<UL><LI>Max Depth = 116<LI>Call Chain = DSHOT_DMA_Config &rArr; DMA_DeInit
    956. 

  956. </UL>
    957. 

  957. <BR>[Calls]<UL><LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_DMACmd
    958. 

  958. <LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_AHB1PeriphClockCmd
    959. 

  959. <LI><a href="#[80]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_Init
    960. 

  960. <LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_ITConfig
    961. 

  961. <LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_GetCmdStatus
    962. 

  962. <LI><a href="#[b1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_DeInit
    963. 

  963. <LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_Cmd
    964. 

  964. <LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_ClearITPendingBit
    965. 

  965. </UL>
    966. 

  966. <BR>[Called By]<UL><LI><a href="#[23]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM1_UP_TIM10_IRQHandler
    967. 

  967. </UL>
    968. 

  968. 

  969. <P><STRONG><a name="[b4]"></a>Dshot_Config</STRONG> (Thumb, 240 bytes, Stack size 48 bytes, main.o(i.Dshot_Config))
    970. 

  970. <BR><BR>[Stack]<UL><LI>Max Depth = 116<LI>Call Chain = Dshot_Config &rArr; Dshot_TIM_Config &rArr; TIM_TimeBaseInit
    971. 

  971. </UL>
    972. 

  972. <BR>[Calls]<UL><LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_NVIC_Config
    973. 

  973. <LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_Mod_Config
    974. 

  974. <LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Dshot_TIM_Config
    975. 

  975. <LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Dshot_NVIC_Config
    976. 

  976. <LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Dshot_GPIO_Config
    977. 

  977. </UL>
    978. 

  978. <BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    979. 

  979. </UL>
    980. 

  980. 

  981. <P><STRONG><a name="[b5]"></a>Dshot_GPIO_Config</STRONG> (Thumb, 66 bytes, Stack size 32 bytes, dshot.o(i.Dshot_GPIO_Config))
    982. 

  982. <BR><BR>[Stack]<UL><LI>Max Depth = 52<LI>Call Chain = Dshot_GPIO_Config &rArr; GPIO_Init
    983. 

  983. </UL>
    984. 

  984. <BR>[Calls]<UL><LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_AHB1PeriphClockCmd
    985. 

  985. <LI><a href="#[a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_PinAFConfig
    986. 

  986. <LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_Init
    987. 

  987. </UL>
    988. 

  988. <BR>[Called By]<UL><LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Dshot_Config
    989. 

  989. </UL>
    990. 

  990. 

  991. <P><STRONG><a name="[b7]"></a>Dshot_NVIC_Config</STRONG> (Thumb, 28 bytes, Stack size 8 bytes, dshot.o(i.Dshot_NVIC_Config))
    992. 

  992. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = Dshot_NVIC_Config &rArr; NVIC_Init
    993. 

  993. </UL>
    994. 

  994. <BR>[Calls]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NVIC_Init
    995. 

  995. </UL>
    996. 

  996. <BR>[Called By]<UL><LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Dshot_Config
    997. 

  997. </UL>
    998. 

  998. 

  999. <P><STRONG><a name="[b6]"></a>Dshot_TIM_Config</STRONG> (Thumb, 106 bytes, Stack size 56 bytes, dshot.o(i.Dshot_TIM_Config))
    1000. 

  1000. <BR><BR>[Stack]<UL><LI>Max Depth = 68<LI>Call Chain = Dshot_TIM_Config &rArr; TIM_TimeBaseInit
    1001. 

  1001. </UL>
    1002. 

  1002. <BR>[Calls]<UL><LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_TimeBaseInit
    1003. 

  1003. <LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_Cmd
    1004. 

  1004. <LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_ARRPreloadConfig
    1005. 

  1005. </UL>
    1006. 

  1006. <BR>[Called By]<UL><LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Dshot_Config
    1007. 

  1007. </UL>
    1008. 

  1008. 

  1009. <P><STRONG><a name="[97]"></a>Equation</STRONG> (Thumb, 60 bytes, Stack size 0 bytes, main.o(i.Equation))
    1010. 

  1010. <BR><BR>[Called By]<UL><LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AnaMotorData
    1011. 

  1011. </UL>
    1012. 

  1012. 

  1013. <P><STRONG><a name="[d8]"></a>FLASH_DataCacheCmd</STRONG> (Thumb, 22 bytes, Stack size 0 bytes, stm32f4xx_flash.o(i.FLASH_DataCacheCmd))
    1014. 

  1014. <BR><BR>[Called By]<UL><LI><a href="#[c3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;STMFLASH_Write
    1015. 

  1015. </UL>
    1016. 

  1016. 

  1017. <P><STRONG><a name="[bb]"></a>FLASH_EraseSector</STRONG> (Thumb, 104 bytes, Stack size 16 bytes, stm32f4xx_flash.o(i.FLASH_EraseSector))
    1018. 

  1018. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = FLASH_EraseSector &rArr; FLASH_WaitForLastOperation
    1019. 

  1019. </UL>
    1020. 

  1020. <BR>[Calls]<UL><LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_WaitForLastOperation
    1021. 

  1021. </UL>
    1022. 

  1022. <BR>[Called By]<UL><LI><a href="#[c3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;STMFLASH_Write
    1023. 

  1023. </UL>
    1024. 

  1024. 

  1025. <P><STRONG><a name="[be]"></a>FLASH_GetStatus</STRONG> (Thumb, 56 bytes, Stack size 0 bytes, stm32f4xx_flash.o(i.FLASH_GetStatus))
    1026. 

  1026. <BR><BR>[Called By]<UL><LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_WaitForLastOperation
    1027. 

  1027. </UL>
    1028. 

  1028. 

  1029. <P><STRONG><a name="[da]"></a>FLASH_Lock</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, stm32f4xx_flash.o(i.FLASH_Lock))
    1030. 

  1030. <BR><BR>[Called By]<UL><LI><a href="#[c3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;STMFLASH_Write
    1031. 

  1031. </UL>
    1032. 

  1032. 

  1033. <P><STRONG><a name="[bd]"></a>FLASH_ProgramWord</STRONG> (Thumb, 56 bytes, Stack size 16 bytes, stm32f4xx_flash.o(i.FLASH_ProgramWord))
    1034. 

  1034. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = FLASH_ProgramWord &rArr; FLASH_WaitForLastOperation
    1035. 

  1035. </UL>
    1036. 

  1036. <BR>[Calls]<UL><LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_WaitForLastOperation
    1037. 

  1037. </UL>
    1038. 

  1038. <BR>[Called By]<UL><LI><a href="#[c3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;STMFLASH_Write
    1039. 

  1039. </UL>
    1040. 

  1040. 

  1041. <P><STRONG><a name="[d7]"></a>FLASH_Unlock</STRONG> (Thumb, 22 bytes, Stack size 0 bytes, stm32f4xx_flash.o(i.FLASH_Unlock))
    1042. 

  1042. <BR><BR>[Called By]<UL><LI><a href="#[c3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;STMFLASH_Write
    1043. 

  1043. </UL>
    1044. 

  1044. 

  1045. <P><STRONG><a name="[bc]"></a>FLASH_WaitForLastOperation</STRONG> (Thumb, 30 bytes, Stack size 8 bytes, stm32f4xx_flash.o(i.FLASH_WaitForLastOperation))
    1046. 

  1046. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = FLASH_WaitForLastOperation
    1047. 

  1047. </UL>
    1048. 

  1048. <BR>[Calls]<UL><LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_GetStatus
    1049. 

  1049. </UL>
    1050. 

  1050. <BR>[Called By]<UL><LI><a href="#[bd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_ProgramWord
    1051. 

  1051. <LI><a href="#[bb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_EraseSector
    1052. 

  1052. </UL>
    1053. 

  1053. 

  1054. <P><STRONG><a name="[bf]"></a>Flash_ReadInf</STRONG> (Thumb, 142 bytes, Stack size 8 bytes, main.o(i.Flash_ReadInf))
    1055. 

  1055. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = Flash_ReadInf &rArr; Flash_WriteInf &rArr; STMFLASH_Write &rArr; FLASH_ProgramWord &rArr; FLASH_WaitForLastOperation
    1056. 

  1056. </UL>
    1057. 

  1057. <BR>[Calls]<UL><LI><a href="#[c0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;STMFLASH_ReadWord
    1058. 

  1058. <LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ReadFloatWord
    1059. 

  1059. <LI><a href="#[c1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Flash_WriteInf
    1060. 

  1060. </UL>
    1061. 

  1061. <BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1062. 

  1062. </UL>
    1063. 

  1063. 

  1064. <P><STRONG><a name="[c1]"></a>Flash_WriteInf</STRONG> (Thumb, 170 bytes, Stack size 8 bytes, main.o(i.Flash_WriteInf))
    1065. 

  1065. <BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = Flash_WriteInf &rArr; STMFLASH_Write &rArr; FLASH_ProgramWord &rArr; FLASH_WaitForLastOperation
    1066. 

  1066. </UL>
    1067. 

  1067. <BR>[Calls]<UL><LI><a href="#[c3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;STMFLASH_Write
    1068. 

  1068. <LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IWDG_Feed
    1069. 

  1069. </UL>
    1070. 

  1070. <BR>[Called By]<UL><LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_Updata_requre
    1071. 

  1071. <LI><a href="#[bf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Flash_ReadInf
    1072. 

  1072. </UL>
    1073. 

  1073. 

  1074. <P><STRONG><a name="[c4]"></a>GPIO_Config</STRONG> (Thumb, 46 bytes, Stack size 24 bytes, led.o(i.GPIO_Config))
    1075. 

  1075. <BR><BR>[Stack]<UL><LI>Max Depth = 44<LI>Call Chain = GPIO_Config &rArr; GPIO_Init
    1076. 

  1076. </UL>
    1077. 

  1077. <BR>[Calls]<UL><LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_AHB1PeriphClockCmd
    1078. 

  1078. <LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_Init
    1079. 

  1079. </UL>
    1080. 

  1080. <BR>[Called By]<UL><LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Overcurrent_Detection_Config
    1081. 

  1081. <LI><a href="#[d1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LED_Config
    1082. 

  1082. </UL>
    1083. 

  1083. 

  1084. <P><STRONG><a name="[c5]"></a>GPIO_IN_Config</STRONG> (Thumb, 38 bytes, Stack size 24 bytes, led.o(i.GPIO_IN_Config))
    1085. 

  1085. <BR><BR>[Stack]<UL><LI>Max Depth = 44<LI>Call Chain = GPIO_IN_Config &rArr; GPIO_Init
    1086. 

  1086. </UL>
    1087. 

  1087. <BR>[Calls]<UL><LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_AHB1PeriphClockCmd
    1088. 

  1088. <LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_Init
    1089. 

  1089. </UL>
    1090. 

  1090. <BR>[Called By]<UL><LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Overcurrent_Detection_Config
    1091. 

  1091. </UL>
    1092. 

  1092. 

  1093. <P><STRONG><a name="[8d]"></a>GPIO_Init</STRONG> (Thumb, 120 bytes, Stack size 20 bytes, stm32f4xx_gpio.o(i.GPIO_Init))
    1094. 

  1094. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = GPIO_Init
    1095. 

  1095. </UL>
    1096. 

  1096. <BR>[Called By]<UL><LI><a href="#[f2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_GPIO_Config
    1097. 

  1097. <LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_IN_Config
    1098. 

  1098. <LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_Config
    1099. 

  1099. <LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Dshot_GPIO_Config
    1100. 

  1100. <LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_GPIO_Config
    1101. 

  1101. <LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_GPIO_Config
    1102. 

  1102. </UL>
    1103. 

  1103. 

  1104. <P><STRONG><a name="[a8]"></a>GPIO_PinAFConfig</STRONG> (Thumb, 32 bytes, Stack size 8 bytes, stm32f4xx_gpio.o(i.GPIO_PinAFConfig))
    1105. 

  1105. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = GPIO_PinAFConfig
    1106. 

  1106. </UL>
    1107. 

  1107. <BR>[Called By]<UL><LI><a href="#[f2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_GPIO_Config
    1108. 

  1108. <LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Dshot_GPIO_Config
    1109. 

  1109. <LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_GPIO_Config
    1110. 

  1110. </UL>
    1111. 

  1111. 

  1112. <P><STRONG><a name="[9e]"></a>GPIO_ReadInputDataBit</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, stm32f4xx_gpio.o(i.GPIO_ReadInputDataBit))
    1113. 

  1113. <BR><BR>[Called By]<UL><LI><a href="#[e5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_1ms_Task
    1114. 

  1114. <LI><a href="#[1e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_RX0_IRQHandler
    1115. 

  1115. </UL>
    1116. 

  1116. 

  1117. <P><STRONG><a name="[d6]"></a>GPIO_ResetBits</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f4xx_gpio.o(i.GPIO_ResetBits))
    1118. 

  1118. <BR><BR>[Called By]<UL><LI><a href="#[e8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_500ms_Task
    1119. 

  1119. <LI><a href="#[e5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_1ms_Task
    1120. 

  1120. <LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Overcurrent_Detection_Config
    1121. 

  1121. </UL>
    1122. 

  1122. 

  1123. <P><STRONG><a name="[d5]"></a>GPIO_SetBits</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f4xx_gpio.o(i.GPIO_SetBits))
    1124. 

  1124. <BR><BR>[Called By]<UL><LI><a href="#[e8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_500ms_Task
    1125. 

  1125. <LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Overcurrent_Detection_Config
    1126. 

  1126. </UL>
    1127. 

  1127. 

  1128. <P><STRONG><a name="[e9]"></a>GPIO_ToggleBits</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, stm32f4xx_gpio.o(i.GPIO_ToggleBits))
    1129. 

  1129. <BR><BR>[Called By]<UL><LI><a href="#[e8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_500ms_Task
    1130. 

  1130. </UL>
    1131. 

  1131. 

  1132. <P><STRONG><a name="[9d]"></a>GetDShotValue</STRONG> (Thumb, 98 bytes, Stack size 16 bytes, main.o(i.GetDShotValue))
    1133. 

  1133. <BR><BR>[Stack]<UL><LI>Max Depth = 104<LI>Call Chain = GetDShotValue &rArr; __aeabi_dmul &rArr; _double_epilogue &rArr; _double_round
    1134. 

  1134. </UL>
    1135. 

  1135. <BR>[Calls]<UL><LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_i2d
    1136. 

  1136. <LI><a href="#[6e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dmul
    1137. 

  1137. <LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_d2iz
    1138. 

  1138. </UL>
    1139. 

  1139. <BR>[Called By]<UL><LI><a href="#[1e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_RX0_IRQHandler
    1140. 

  1140. </UL>
    1141. 

  1141. 

  1142. <P><STRONG><a name="[c6]"></a>GetMotorData</STRONG> (Thumb, 34 bytes, Stack size 8 bytes, main.o(i.GetMotorData))
    1143. 

  1143. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = GetMotorData
    1144. 

  1144. </UL>
    1145. 

  1145. <BR>[Calls]<UL><LI><a href="#[c7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_ReceiveData
    1146. 

  1146. </UL>
    1147. 

  1147. <BR>[Called By]<UL><LI><a href="#[51]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART6_IRQHandler
    1148. 

  1148. <LI><a href="#[31]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART3_IRQHandler
    1149. 

  1149. <LI><a href="#[30]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART2_IRQHandler
    1150. 

  1150. <LI><a href="#[3f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART5_IRQHandler
    1151. 

  1151. </UL>
    1152. 

  1152. 

  1153. <P><STRONG><a name="[c8]"></a>Get_SOFT_ADC</STRONG> (Thumb, 40 bytes, Stack size 8 bytes, adc.o(i.Get_SOFT_ADC))
    1154. 

  1154. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = Get_SOFT_ADC &rArr; ADC_RegularChannelConfig
    1155. 

  1155. </UL>
    1156. 

  1156. <BR>[Calls]<UL><LI><a href="#[c9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_SoftwareStartConv
    1157. 

  1157. <LI><a href="#[89]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_RegularChannelConfig
    1158. 

  1158. <LI><a href="#[ca]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_GetFlagStatus
    1159. 

  1159. <LI><a href="#[cb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_GetConversionValue
    1160. 

  1160. </UL>
    1161. 

  1161. <BR>[Called By]<UL><LI><a href="#[e5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_1ms_Task
    1162. 

  1162. </UL>
    1163. 

  1163. 

  1164. <P><STRONG><a name="[af]"></a>Get_Temperature</STRONG> (Thumb, 382 bytes, Stack size 32 bytes, ntc.o(i.Get_Temperature))
    1165. 

  1165. <BR><BR>[Stack]<UL><LI>Max Depth = 120<LI>Call Chain = Get_Temperature &rArr; __aeabi_dmul &rArr; _double_epilogue &rArr; _double_round
    1166. 

  1166. </UL>
    1167. 

  1167. <BR>[Calls]<UL><LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_ui2d
    1168. 

  1168. <LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_f2d
    1169. 

  1169. <LI><a href="#[6e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dmul
    1170. 

  1170. <LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
    1171. 

  1171. <LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_drsub
    1172. 

  1172. <LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_ddiv
    1173. 

  1173. <LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_d2f
    1174. 

  1174. </UL>
    1175. 

  1175. <BR>[Called By]<UL><LI><a href="#[42]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA2_Stream0_IRQHandler
    1176. 

  1176. </UL>
    1177. 

  1177. 

  1178. <P><STRONG><a name="[2]"></a>HardFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, it.o(i.HardFault_Handler))
    1179. 

  1179. <BR><BR>[Calls]<UL><LI><a href="#[2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HardFault_Handler
    1180. 

  1180. </UL>
    1181. 

  1181. <BR>[Called By]<UL><LI><a href="#[2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HardFault_Handler
    1182. 

  1182. </UL>
    1183. 

  1183. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    1184. 

  1184. </UL>
    1185. 

  1185. <P><STRONG><a name="[cc]"></a>IWDG_Config</STRONG> (Thumb, 38 bytes, Stack size 16 bytes, iwag.o(i.IWDG_Config))
    1186. 

  1186. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = IWDG_Config
    1187. 

  1187. </UL>
    1188. 

  1188. <BR>[Calls]<UL><LI><a href="#[cd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IWDG_WriteAccessCmd
    1189. 

  1189. <LI><a href="#[cf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IWDG_SetReload
    1190. 

  1190. <LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IWDG_SetPrescaler
    1191. 

  1191. <LI><a href="#[d0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IWDG_ReloadCounter
    1192. 

  1192. </UL>
    1193. 

  1193. <BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1194. 

  1194. </UL>
    1195. 

  1195. 

  1196. <P><STRONG><a name="[10b]"></a>IWDG_Enable</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, stm32f4xx_iwdg.o(i.IWDG_Enable), UNUSED)
    1197. 

  1197. 

  1198. <P><STRONG><a name="[9b]"></a>IWDG_Feed</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, iwag.o(i.IWDG_Feed))
    1199. 

  1199. <BR><BR>[Called By]<UL><LI><a href="#[c1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Flash_WriteInf
    1200. 

  1200. <LI><a href="#[1e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_RX0_IRQHandler
    1201. 

  1201. </UL>
    1202. 

  1202. 

  1203. <P><STRONG><a name="[d0]"></a>IWDG_ReloadCounter</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, stm32f4xx_iwdg.o(i.IWDG_ReloadCounter))
    1204. 

  1204. <BR><BR>[Called By]<UL><LI><a href="#[cc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IWDG_Config
    1205. 

  1205. </UL>
    1206. 

  1206. 

  1207. <P><STRONG><a name="[ce]"></a>IWDG_SetPrescaler</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32f4xx_iwdg.o(i.IWDG_SetPrescaler))
    1208. 

  1208. <BR><BR>[Called By]<UL><LI><a href="#[cc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IWDG_Config
    1209. 

  1209. </UL>
    1210. 

  1210. 

  1211. <P><STRONG><a name="[cf]"></a>IWDG_SetReload</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32f4xx_iwdg.o(i.IWDG_SetReload))
    1212. 

  1212. <BR><BR>[Called By]<UL><LI><a href="#[cc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IWDG_Config
    1213. 

  1213. </UL>
    1214. 

  1214. 

  1215. <P><STRONG><a name="[cd]"></a>IWDG_WriteAccessCmd</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32f4xx_iwdg.o(i.IWDG_WriteAccessCmd))
    1216. 

  1216. <BR><BR>[Called By]<UL><LI><a href="#[cc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IWDG_Config
    1217. 

  1217. </UL>
    1218. 

  1218. 

  1219. <P><STRONG><a name="[d1]"></a>LED_Config</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, main.o(i.LED_Config))
    1220. 

  1220. <BR><BR>[Stack]<UL><LI>Max Depth = 44<LI>Call Chain = LED_Config &rArr; GPIO_Config &rArr; GPIO_Init
    1221. 

  1221. </UL>
    1222. 

  1222. <BR>[Calls]<UL><LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_Config
    1223. 

  1223. </UL>
    1224. 

  1224. <BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1225. 

  1225. </UL>
    1226. 

  1226. 

  1227. <P><STRONG><a name="[fb]"></a>Micros</STRONG> (Thumb, 50 bytes, Stack size 8 bytes, delay.o(i.Micros))
    1228. 

  1228. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = Micros
    1229. 

  1229. </UL>
    1230. 

  1230. <BR>[Called By]<UL><LI><a href="#[fa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;delay_ms
    1231. 

  1231. </UL>
    1232. 

  1232. 

  1233. <P><STRONG><a name="[e7]"></a>Motor_Control</STRONG> (Thumb, 380 bytes, Stack size 12 bytes, main.o(i.Motor_Control))
    1234. 

  1234. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = Motor_Control
    1235. 

  1235. </UL>
    1236. 

  1236. <BR>[Called By]<UL><LI><a href="#[e6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_20ms_Task
    1237. 

  1237. </UL>
    1238. 

  1238. 

  1239. <P><STRONG><a name="[8e]"></a>NVIC_Init</STRONG> (Thumb, 96 bytes, Stack size 12 bytes, misc.o(i.NVIC_Init))
    1240. 

  1240. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = NVIC_Init
    1241. 

  1241. </UL>
    1242. 

  1242. <BR>[Called By]<UL><LI><a href="#[f3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_NVIC_Config
    1243. 

  1243. <LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_NVIC_Config
    1244. 

  1244. <LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Dshot_NVIC_Config
    1245. 

  1245. <LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_NVIC_Config
    1246. 

  1246. <LI><a href="#[7c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_NVIC_Config
    1247. 

  1247. </UL>
    1248. 

  1248. 

  1249. <P><STRONG><a name="[fd]"></a>NVIC_PriorityGroupConfig</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, misc.o(i.NVIC_PriorityGroupConfig))
    1250. 

  1250. <BR><BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1251. 

  1251. </UL>
    1252. 

  1252. 

  1253. <P><STRONG><a name="[d2]"></a>Other_Task</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, main.o(i.Other_Task))
    1254. 

  1254. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = Other_Task &rArr; Send_Updata_requre &rArr; Flash_WriteInf &rArr; STMFLASH_Write &rArr; FLASH_ProgramWord &rArr; FLASH_WaitForLastOperation
    1255. 

  1255. </UL>
    1256. 

  1256. <BR>[Calls]<UL><LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_Updata_requre
    1257. 

  1257. </UL>
    1258. 

  1258. <BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1259. 

  1259. </UL>
    1260. 

  1260. 

  1261. <P><STRONG><a name="[d4]"></a>Overcurrent_Detection_Config</STRONG> (Thumb, 82 bytes, Stack size 16 bytes, main.o(i.Overcurrent_Detection_Config))
    1262. 

  1262. <BR><BR>[Stack]<UL><LI>Max Depth = 60<LI>Call Chain = Overcurrent_Detection_Config &rArr; GPIO_IN_Config &rArr; GPIO_Init
    1263. 

  1263. </UL>
    1264. 

  1264. <BR>[Calls]<UL><LI><a href="#[d5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_SetBits
    1265. 

  1265. <LI><a href="#[d6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_ResetBits
    1266. 

  1266. <LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_IN_Config
    1267. 

  1267. <LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_Config
    1268. 

  1268. </UL>
    1269. 

  1269. <BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1270. 

  1270. </UL>
    1271. 

  1271. 

  1272. <P><STRONG><a name="[7f]"></a>RCC_AHB1PeriphClockCmd</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, stm32f4xx_rcc.o(i.RCC_AHB1PeriphClockCmd))
    1273. 

  1273. <BR><BR>[Called By]<UL><LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DSHOT_DMA_Config
    1274. 

  1274. <LI><a href="#[f2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_GPIO_Config
    1275. 

  1275. <LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_IN_Config
    1276. 

  1276. <LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_Config
    1277. 

  1277. <LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Dshot_GPIO_Config
    1278. 

  1278. <LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_GPIO_Config
    1279. 

  1279. <LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_GPIO_Config
    1280. 

  1280. <LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_DMA_Config
    1281. 

  1281. </UL>
    1282. 

  1282. 

  1283. <P><STRONG><a name="[61]"></a>RCC_APB1PeriphClockCmd</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, stm32f4xx_rcc.o(i.RCC_APB1PeriphClockCmd))
    1284. 

  1284. <BR><BR>[Called By]<UL><LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_Mod_Config
    1285. 

  1285. </UL>
    1286. 

  1286. <BR>[Address Reference Count : 3]<UL><LI> main.o(i.ADC_Config)
    1287. 

  1287. <LI> main.o(i.Dshot_Config)
    1288. 

  1288. <LI> main.o(i.USART_Config)
    1289. 

  1289. </UL>
    1290. 

  1290. <P><STRONG><a name="[64]"></a>RCC_APB2PeriphClockCmd</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, stm32f4xx_rcc.o(i.RCC_APB2PeriphClockCmd))
    1291. 

  1291. <BR><BR>[Called By]<UL><LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_SOFT_Mode_Config
    1292. 

  1292. <LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_DMA_Mode_Config
    1293. 

  1293. </UL>
    1294. 

  1294. <BR>[Address Reference Count : 2]<UL><LI> main.o(i.Dshot_Config)
    1295. 

  1295. <LI> main.o(i.USART_Config)
    1296. 

  1296. </UL>
    1297. 

  1297. <P><STRONG><a name="[86]"></a>RCC_APB2PeriphResetCmd</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, stm32f4xx_rcc.o(i.RCC_APB2PeriphResetCmd))
    1298. 

  1298. <BR><BR>[Called By]<UL><LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_SOFT_Mode_Config
    1299. 

  1299. <LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_DMA_Mode_Config
    1300. 

  1300. </UL>
    1301. 

  1301. 

  1302. <P><STRONG><a name="[f6]"></a>RCC_GetClocksFreq</STRONG> (Thumb, 132 bytes, Stack size 16 bytes, stm32f4xx_rcc.o(i.RCC_GetClocksFreq))
    1303. 

  1303. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = RCC_GetClocksFreq
    1304. 

  1304. </UL>
    1305. 

  1305. <BR>[Called By]<UL><LI><a href="#[f5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_Init
    1306. 

  1306. <LI><a href="#[f9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;cycleCounterInit
    1307. 

  1307. </UL>
    1308. 

  1308. 

  1309. <P><STRONG><a name="[c2]"></a>ReadFloatWord</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, flash.o(i.ReadFloatWord))
    1310. 

  1310. <BR><BR>[Called By]<UL><LI><a href="#[bf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Flash_ReadInf
    1311. 

  1311. </UL>
    1312. 

  1312. 

  1313. <P><STRONG><a name="[99]"></a>Rec_Flash_Set</STRONG> (Thumb, 196 bytes, Stack size 32 bytes, can.o(i.Rec_Flash_Set))
    1314. 

  1314. <BR><BR>[Stack]<UL><LI>Max Depth = 120<LI>Call Chain = Rec_Flash_Set &rArr; __aeabi_dmul &rArr; _double_epilogue &rArr; _double_round
    1315. 

  1315. </UL>
    1316. 

  1316. <BR>[Calls]<UL><LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_ui2d
    1317. 

  1317. <LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_i2d
    1318. 

  1318. <LI><a href="#[6e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dmul
    1319. 

  1319. <LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
    1320. 

  1320. <LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_d2f
    1321. 

  1321. </UL>
    1322. 

  1322. <BR>[Called By]<UL><LI><a href="#[1e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_RX0_IRQHandler
    1323. 

  1323. </UL>
    1324. 

  1324. 

  1325. <P><STRONG><a name="[9c]"></a>ResearchProtection</STRONG> (Thumb, 22 bytes, Stack size 0 bytes, it.o(i.ResearchProtection))
    1326. 

  1326. <BR><BR>[Called By]<UL><LI><a href="#[1e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_RX0_IRQHandler
    1327. 

  1327. </UL>
    1328. 

  1328. 

  1329. <P><STRONG><a name="[d9]"></a>STMFLASH_GetFlashSector</STRONG> (Thumb, 114 bytes, Stack size 0 bytes, flash.o(i.STMFLASH_GetFlashSector))
    1330. 

  1330. <BR><BR>[Called By]<UL><LI><a href="#[c3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;STMFLASH_Write
    1331. 

  1331. </UL>
    1332. 

  1332. 

  1333. <P><STRONG><a name="[c0]"></a>STMFLASH_ReadWord</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, flash.o(i.STMFLASH_ReadWord))
    1334. 

  1334. <BR><BR>[Called By]<UL><LI><a href="#[bf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Flash_ReadInf
    1335. 

  1335. </UL>
    1336. 

  1336. 

  1337. <P><STRONG><a name="[c3]"></a>STMFLASH_Write</STRONG> (Thumb, 122 bytes, Stack size 24 bytes, flash.o(i.STMFLASH_Write))
    1338. 

  1338. <BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = STMFLASH_Write &rArr; FLASH_ProgramWord &rArr; FLASH_WaitForLastOperation
    1339. 

  1339. </UL>
    1340. 

  1340. <BR>[Calls]<UL><LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_Unlock
    1341. 

  1341. <LI><a href="#[bd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_ProgramWord
    1342. 

  1342. <LI><a href="#[da]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_Lock
    1343. 

  1343. <LI><a href="#[bb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_EraseSector
    1344. 

  1344. <LI><a href="#[d8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_DataCacheCmd
    1345. 

  1345. <LI><a href="#[d9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;STMFLASH_GetFlashSector
    1346. 

  1346. </UL>
    1347. 

  1347. <BR>[Called By]<UL><LI><a href="#[c1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Flash_WriteInf
    1348. 

  1348. </UL>
    1349. 

  1349. 

  1350. <P><STRONG><a name="[db]"></a>Send_CAN_DATA1</STRONG> (Thumb, 96 bytes, Stack size 8 bytes, can.o(i.Send_CAN_DATA1))
    1351. 

  1351. <BR><BR>[Stack]<UL><LI>Max Depth = 60<LI>Call Chain = Send_CAN_DATA1 &rArr; CAN1_Send_Msg &rArr; CAN_Transmit
    1352. 

  1352. </UL>
    1353. 

  1353. <BR>[Calls]<UL><LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_Send_Msg
    1354. 

  1354. </UL>
    1355. 

  1355. <BR>[Called By]<UL><LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_100ms_Task
    1356. 

  1356. </UL>
    1357. 

  1357. 

  1358. <P><STRONG><a name="[dc]"></a>Send_CAN_DATA2</STRONG> (Thumb, 70 bytes, Stack size 0 bytes, can.o(i.Send_CAN_DATA2))
    1359. 

  1359. <BR><BR>[Stack]<UL><LI>Max Depth = 52<LI>Call Chain = Send_CAN_DATA2 &rArr; CAN1_Send_Msg &rArr; CAN_Transmit
    1360. 

  1360. </UL>
    1361. 

  1361. <BR>[Calls]<UL><LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_Send_Msg
    1362. 

  1362. </UL>
    1363. 

  1363. <BR>[Called By]<UL><LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_100ms_Task
    1364. 

  1364. </UL>
    1365. 

  1365. 

  1366. <P><STRONG><a name="[dd]"></a>Send_CAN_DATA3</STRONG> (Thumb, 84 bytes, Stack size 8 bytes, can.o(i.Send_CAN_DATA3))
    1367. 

  1367. <BR><BR>[Stack]<UL><LI>Max Depth = 60<LI>Call Chain = Send_CAN_DATA3 &rArr; CAN1_Send_Msg &rArr; CAN_Transmit
    1368. 

  1368. </UL>
    1369. 

  1369. <BR>[Calls]<UL><LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_Send_Msg
    1370. 

  1370. </UL>
    1371. 

  1371. <BR>[Called By]<UL><LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_100ms_Task
    1372. 

  1372. </UL>
    1373. 

  1373. 

  1374. <P><STRONG><a name="[de]"></a>Send_CAN_DATA4</STRONG> (Thumb, 78 bytes, Stack size 8 bytes, can.o(i.Send_CAN_DATA4))
    1375. 

  1375. <BR><BR>[Stack]<UL><LI>Max Depth = 60<LI>Call Chain = Send_CAN_DATA4 &rArr; CAN1_Send_Msg &rArr; CAN_Transmit
    1376. 

  1376. </UL>
    1377. 

  1377. <BR>[Calls]<UL><LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_Send_Msg
    1378. 

  1378. </UL>
    1379. 

  1379. <BR>[Called By]<UL><LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_100ms_Task
    1380. 

  1380. </UL>
    1381. 

  1381. 

  1382. <P><STRONG><a name="[df]"></a>Send_CAN_DATA5</STRONG> (Thumb, 112 bytes, Stack size 0 bytes, can.o(i.Send_CAN_DATA5))
    1383. 

  1383. <BR><BR>[Stack]<UL><LI>Max Depth = 52<LI>Call Chain = Send_CAN_DATA5 &rArr; CAN1_Send_Msg &rArr; CAN_Transmit
    1384. 

  1384. </UL>
    1385. 

  1385. <BR>[Calls]<UL><LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_Send_Msg
    1386. 

  1386. </UL>
    1387. 

  1387. <BR>[Called By]<UL><LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_100ms_Task
    1388. 

  1388. </UL>
    1389. 

  1389. 

  1390. <P><STRONG><a name="[e0]"></a>Send_CAN_DATA6</STRONG> (Thumb, 84 bytes, Stack size 8 bytes, can.o(i.Send_CAN_DATA6))
    1391. 

  1391. <BR><BR>[Stack]<UL><LI>Max Depth = 60<LI>Call Chain = Send_CAN_DATA6 &rArr; CAN1_Send_Msg &rArr; CAN_Transmit
    1392. 

  1392. </UL>
    1393. 

  1393. <BR>[Calls]<UL><LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_Send_Msg
    1394. 

  1394. </UL>
    1395. 

  1395. <BR>[Called By]<UL><LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_100ms_Task
    1396. 

  1396. </UL>
    1397. 

  1397. 

  1398. <P><STRONG><a name="[e1]"></a>Send_Flash_Set</STRONG> (Thumb, 126 bytes, Stack size 0 bytes, can.o(i.Send_Flash_Set))
    1399. 

  1399. <BR><BR>[Stack]<UL><LI>Max Depth = 52<LI>Call Chain = Send_Flash_Set &rArr; CAN1_Send_Msg &rArr; CAN_Transmit
    1400. 

  1400. </UL>
    1401. 

  1401. <BR>[Calls]<UL><LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_Send_Msg
    1402. 

  1402. </UL>
    1403. 

  1403. <BR>[Called By]<UL><LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_Updata_requre
    1404. 

  1404. <LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_Pixhawk_requre
    1405. 

  1405. </UL>
    1406. 

  1406. 

  1407. <P><STRONG><a name="[e2]"></a>Send_Pixhawk_requre</STRONG> (Thumb, 154 bytes, Stack size 8 bytes, main.o(i.Send_Pixhawk_requre))
    1408. 

  1408. <BR><BR>[Stack]<UL><LI>Max Depth = 60<LI>Call Chain = Send_Pixhawk_requre &rArr; Send_Flash_Set &rArr; CAN1_Send_Msg &rArr; CAN_Transmit
    1409. 

  1409. </UL>
    1410. 

  1410. <BR>[Calls]<UL><LI><a href="#[e1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_Flash_Set
    1411. 

  1411. </UL>
    1412. 

  1412. <BR>[Called By]<UL><LI><a href="#[e4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_10ms_Task
    1413. 

  1413. </UL>
    1414. 

  1414. 

  1415. <P><STRONG><a name="[d3]"></a>Send_Updata_requre</STRONG> (Thumb, 156 bytes, Stack size 8 bytes, main.o(i.Send_Updata_requre))
    1416. 

  1416. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = Send_Updata_requre &rArr; Flash_WriteInf &rArr; STMFLASH_Write &rArr; FLASH_ProgramWord &rArr; FLASH_WaitForLastOperation
    1417. 

  1417. </UL>
    1418. 

  1418. <BR>[Calls]<UL><LI><a href="#[e1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_Flash_Set
    1419. 

  1419. <LI><a href="#[c1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Flash_WriteInf
    1420. 

  1420. </UL>
    1421. 

  1421. <BR>[Called By]<UL><LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Other_Task
    1422. 

  1422. </UL>
    1423. 

  1423. 

  1424. <P><STRONG><a name="[94]"></a>Single_Motor_Config</STRONG> (Thumb, 48 bytes, Stack size 0 bytes, main.o(i.Single_Motor_Config))
    1425. 

  1425. <BR><BR>[Called By]<UL><LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;All_motor_Config
    1426. 

  1426. </UL>
    1427. 

  1427. 

  1428. <P><STRONG><a name="[9a]"></a>SoftReset</STRONG> (Thumb, 32 bytes, Stack size 0 bytes, main.o(i.SoftReset))
    1429. 

  1429. <BR><BR>[Called By]<UL><LI><a href="#[1e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_RX0_IRQHandler
    1430. 

  1430. </UL>
    1431. 

  1431. 

  1432. <P><STRONG><a name="[e3]"></a>SysTick_100ms_Task</STRONG> (Thumb, 84 bytes, Stack size 8 bytes, main.o(i.SysTick_100ms_Task))
    1433. 

  1433. <BR><BR>[Stack]<UL><LI>Max Depth = 68<LI>Call Chain = SysTick_100ms_Task &rArr; Send_CAN_DATA6 &rArr; CAN1_Send_Msg &rArr; CAN_Transmit
    1434. 

  1434. </UL>
    1435. 

  1435. <BR>[Calls]<UL><LI><a href="#[e0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_CAN_DATA6
    1436. 

  1436. <LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_CAN_DATA5
    1437. 

  1437. <LI><a href="#[de]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_CAN_DATA4
    1438. 

  1438. <LI><a href="#[dd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_CAN_DATA3
    1439. 

  1439. <LI><a href="#[dc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_CAN_DATA2
    1440. 

  1440. <LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_CAN_DATA1
    1441. 

  1441. </UL>
    1442. 

  1442. <BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1443. 

  1443. </UL>
    1444. 

  1444. 

  1445. <P><STRONG><a name="[e4]"></a>SysTick_10ms_Task</STRONG> (Thumb, 24 bytes, Stack size 0 bytes, main.o(i.SysTick_10ms_Task))
    1446. 

  1446. <BR><BR>[Stack]<UL><LI>Max Depth = 60<LI>Call Chain = SysTick_10ms_Task &rArr; Send_Pixhawk_requre &rArr; Send_Flash_Set &rArr; CAN1_Send_Msg &rArr; CAN_Transmit
    1447. 

  1447. </UL>
    1448. 

  1448. <BR>[Calls]<UL><LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_Pixhawk_requre
    1449. 

  1449. </UL>
    1450. 

  1450. <BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1451. 

  1451. </UL>
    1452. 

  1452. 

  1453. <P><STRONG><a name="[e5]"></a>SysTick_1ms_Task</STRONG> (Thumb, 198 bytes, Stack size 32 bytes, main.o(i.SysTick_1ms_Task))
    1454. 

  1454. <BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = SysTick_1ms_Task &rArr; Get_SOFT_ADC &rArr; ADC_RegularChannelConfig
    1455. 

  1455. </UL>
    1456. 

  1456. <BR>[Calls]<UL><LI><a href="#[c8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_SOFT_ADC
    1457. 

  1457. <LI><a href="#[d6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_ResetBits
    1458. 

  1458. <LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_ReadInputDataBit
    1459. 

  1459. </UL>
    1460. 

  1460. <BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1461. 

  1461. </UL>
    1462. 

  1462. 

  1463. <P><STRONG><a name="[e6]"></a>SysTick_20ms_Task</STRONG> (Thumb, 50 bytes, Stack size 4 bytes, main.o(i.SysTick_20ms_Task))
    1464. 

  1464. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = SysTick_20ms_Task &rArr; Motor_Control
    1465. 

  1465. </UL>
    1466. 

  1466. <BR>[Calls]<UL><LI><a href="#[e7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Motor_Control
    1467. 

  1467. </UL>
    1468. 

  1468. <BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1469. 

  1469. </UL>
    1470. 

  1470. 

  1471. <P><STRONG><a name="[e8]"></a>SysTick_500ms_Task</STRONG> (Thumb, 94 bytes, Stack size 16 bytes, main.o(i.SysTick_500ms_Task))
    1472. 

  1472. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = SysTick_500ms_Task
    1473. 

  1473. </UL>
    1474. 

  1474. <BR>[Calls]<UL><LI><a href="#[e9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_ToggleBits
    1475. 

  1475. <LI><a href="#[d5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_SetBits
    1476. 

  1476. <LI><a href="#[d6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_ResetBits
    1477. 

  1477. </UL>
    1478. 

  1478. <BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1479. 

  1479. </UL>
    1480. 

  1480. 

  1481. <P><STRONG><a name="[9]"></a>SysTick_Handler</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, it.o(i.SysTick_Handler))
    1482. 

  1482. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    1483. 

  1483. </UL>
    1484. 

  1484. <P><STRONG><a name="[5d]"></a>SystemInit</STRONG> (Thumb, 74 bytes, Stack size 8 bytes, system_stm32f4xx.o(i.SystemInit))
    1485. 

  1485. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = SystemInit &rArr; SetSysClock
    1486. 

  1486. </UL>
    1487. 

  1487. <BR>[Calls]<UL><LI><a href="#[ea]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SetSysClock
    1488. 

  1488. </UL>
    1489. 

  1489. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(.text)
    1490. 

  1490. </UL>
    1491. 

  1491. <P><STRONG><a name="[23]"></a>TIM1_UP_TIM10_IRQHandler</STRONG> (Thumb, 202 bytes, Stack size 32 bytes, it.o(i.TIM1_UP_TIM10_IRQHandler))
    1492. 

  1492. <BR><BR>[Stack]<UL><LI>Max Depth = 148<LI>Call Chain = TIM1_UP_TIM10_IRQHandler &rArr; DSHOT_DMA_Config &rArr; DMA_DeInit
    1493. 

  1493. </UL>
    1494. 

  1494. <BR>[Calls]<UL><LI><a href="#[ed]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pwmWriteDigital
    1495. 

  1495. <LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DSHOT_DMA_Config
    1496. 

  1496. <LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_GetITStatus
    1497. 

  1497. <LI><a href="#[ec]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_ClearITPendingBit
    1498. 

  1498. </UL>
    1499. 

  1499. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    1500. 

  1500. </UL>
    1501. 

  1501. <P><STRONG><a name="[ba]"></a>TIM_ARRPreloadConfig</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, stm32f4xx_tim.o(i.TIM_ARRPreloadConfig))
    1502. 

  1502. <BR><BR>[Called By]<UL><LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_Mod_Config
    1503. 

  1503. <LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Dshot_TIM_Config
    1504. 

  1504. </UL>
    1505. 

  1505. 

  1506. <P><STRONG><a name="[ec]"></a>TIM_ClearITPendingBit</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32f4xx_tim.o(i.TIM_ClearITPendingBit))
    1507. 

  1507. <BR><BR>[Called By]<UL><LI><a href="#[23]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM1_UP_TIM10_IRQHandler
    1508. 

  1508. </UL>
    1509. 

  1509. 

  1510. <P><STRONG><a name="[92]"></a>TIM_Cmd</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, stm32f4xx_tim.o(i.TIM_Cmd))
    1511. 

  1511. <BR><BR>[Called By]<UL><LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_Mod_Config
    1512. 

  1512. <LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Dshot_TIM_Config
    1513. 

  1513. <LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_TIM_Config
    1514. 

  1514. </UL>
    1515. 

  1515. 

  1516. <P><STRONG><a name="[90]"></a>TIM_CtrlPWMOutputs</STRONG> (Thumb, 22 bytes, Stack size 0 bytes, stm32f4xx_tim.o(i.TIM_CtrlPWMOutputs))
    1517. 

  1517. <BR><BR>[Called By]<UL><LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_TIM_Config
    1518. 

  1518. </UL>
    1519. 

  1519. 

  1520. <P><STRONG><a name="[b3]"></a>TIM_DMACmd</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, stm32f4xx_tim.o(i.TIM_DMACmd))
    1521. 

  1521. <BR><BR>[Called By]<UL><LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DSHOT_DMA_Config
    1522. 

  1522. </UL>
    1523. 

  1523. 

  1524. <P><STRONG><a name="[eb]"></a>TIM_GetITStatus</STRONG> (Thumb, 24 bytes, Stack size 0 bytes, stm32f4xx_tim.o(i.TIM_GetITStatus))
    1525. 

  1525. <BR><BR>[Called By]<UL><LI><a href="#[23]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM1_UP_TIM10_IRQHandler
    1526. 

  1526. </UL>
    1527. 

  1527. 

  1528. <P><STRONG><a name="[ee]"></a>TIM_ITConfig</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, stm32f4xx_tim.o(i.TIM_ITConfig))
    1529. 

  1529. <BR><BR>[Called By]<UL><LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_Mod_Config
    1530. 

  1530. </UL>
    1531. 

  1531. 

  1532. <P><STRONG><a name="[b8]"></a>TIM_Mod_Config</STRONG> (Thumb, 78 bytes, Stack size 32 bytes, time.o(i.TIM_Mod_Config))
    1533. 

  1533. <BR><BR>[Stack]<UL><LI>Max Depth = 44<LI>Call Chain = TIM_Mod_Config &rArr; TIM_TimeBaseInit
    1534. 

  1534. </UL>
    1535. 

  1535. <BR>[Calls]<UL><LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_TimeBaseInit
    1536. 

  1536. <LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_SelectOutputTrigger
    1537. 

  1537. <LI><a href="#[ee]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_ITConfig
    1538. 

  1538. <LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_Cmd
    1539. 

  1539. <LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_ARRPreloadConfig
    1540. 

  1540. </UL>
    1541. 

  1541. <BR>[Called By]<UL><LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Dshot_Config
    1542. 

  1542. </UL>
    1543. 

  1543. 

  1544. <P><STRONG><a name="[b9]"></a>TIM_NVIC_Config</STRONG> (Thumb, 28 bytes, Stack size 8 bytes, time.o(i.TIM_NVIC_Config))
    1545. 

  1545. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = TIM_NVIC_Config &rArr; NVIC_Init
    1546. 

  1546. </UL>
    1547. 

  1547. <BR>[Calls]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NVIC_Init
    1548. 

  1548. </UL>
    1549. 

  1549. <BR>[Called By]<UL><LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Dshot_Config
    1550. 

  1550. </UL>
    1551. 

  1551. 

  1552. <P><STRONG><a name="[60]"></a>TIM_OC1Init</STRONG> (Thumb, 88 bytes, Stack size 12 bytes, stm32f4xx_tim.o(i.TIM_OC1Init))
    1553. 

  1553. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = TIM_OC1Init
    1554. 

  1554. </UL>
    1555. 

  1555. <BR>[Address Reference Count : 2]<UL><LI> main.o(i.ADC_Config)
    1556. 

  1556. <LI> main.o(i.Dshot_Config)
    1557. 

  1557. </UL>
    1558. 

  1558. <P><STRONG><a name="[5f]"></a>TIM_OC1PreloadConfig</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, stm32f4xx_tim.o(i.TIM_OC1PreloadConfig))
    1559. 

  1559. <BR>[Address Reference Count : 2]<UL><LI> main.o(i.ADC_Config)
    1560. 

  1560. <LI> main.o(i.Dshot_Config)
    1561. 

  1561. </UL>
    1562. 

  1562. <P><STRONG><a name="[63]"></a>TIM_OC2Init</STRONG> (Thumb, 120 bytes, Stack size 16 bytes, stm32f4xx_tim.o(i.TIM_OC2Init))
    1563. 

  1563. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = TIM_OC2Init
    1564. 

  1564. </UL>
    1565. 

  1565. <BR>[Address Reference Count : 1]<UL><LI> main.o(i.Dshot_Config)
    1566. 

  1566. </UL>
    1567. 

  1567. <P><STRONG><a name="[62]"></a>TIM_OC2PreloadConfig</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, stm32f4xx_tim.o(i.TIM_OC2PreloadConfig))
    1568. 

  1568. <BR>[Address Reference Count : 1]<UL><LI> main.o(i.Dshot_Config)
    1569. 

  1569. </UL>
    1570. 

  1570. <P><STRONG><a name="[91]"></a>TIM_SelectOutputTrigger</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, stm32f4xx_tim.o(i.TIM_SelectOutputTrigger))
    1571. 

  1571. <BR><BR>[Called By]<UL><LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_Mod_Config
    1572. 

  1572. <LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_TIM_Config
    1573. 

  1573. </UL>
    1574. 

  1574. 

  1575. <P><STRONG><a name="[8f]"></a>TIM_TimeBaseInit</STRONG> (Thumb, 96 bytes, Stack size 12 bytes, stm32f4xx_tim.o(i.TIM_TimeBaseInit))
    1576. 

  1576. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = TIM_TimeBaseInit
    1577. 

  1577. </UL>
    1578. 

  1578. <BR>[Called By]<UL><LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_Mod_Config
    1579. 

  1579. <LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Dshot_TIM_Config
    1580. 

  1580. <LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_TIM_Config
    1581. 

  1581. </UL>
    1582. 

  1582. 

  1583. <P><STRONG><a name="[3f]"></a>UART5_IRQHandler</STRONG> (Thumb, 68 bytes, Stack size 16 bytes, it.o(i.UART5_IRQHandler))
    1584. 

  1584. <BR><BR>[Stack]<UL><LI>Max Depth = 112<LI>Call Chain = UART5_IRQHandler &rArr; AnaMotorData &rArr; __aeabi_dmul &rArr; _double_epilogue &rArr; _double_round
    1585. 

  1585. </UL>
    1586. 

  1586. <BR>[Calls]<UL><LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GetMotorData
    1587. 

  1587. <LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AnaMotorData
    1588. 

  1588. <LI><a href="#[ef]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_GetITStatus
    1589. 

  1589. <LI><a href="#[f0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_ClearITPendingBit
    1590. 

  1590. </UL>
    1591. 

  1591. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    1592. 

  1592. </UL>
    1593. 

  1593. <P><STRONG><a name="[30]"></a>USART2_IRQHandler</STRONG> (Thumb, 72 bytes, Stack size 16 bytes, it.o(i.USART2_IRQHandler))
    1594. 

  1594. <BR><BR>[Stack]<UL><LI>Max Depth = 112<LI>Call Chain = USART2_IRQHandler &rArr; AnaMotorData &rArr; __aeabi_dmul &rArr; _double_epilogue &rArr; _double_round
    1595. 

  1595. </UL>
    1596. 

  1596. <BR>[Calls]<UL><LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GetMotorData
    1597. 

  1597. <LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AnaMotorData
    1598. 

  1598. <LI><a href="#[ef]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_GetITStatus
    1599. 

  1599. <LI><a href="#[f0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_ClearITPendingBit
    1600. 

  1600. </UL>
    1601. 

  1601. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    1602. 

  1602. </UL>
    1603. 

  1603. <P><STRONG><a name="[31]"></a>USART3_IRQHandler</STRONG> (Thumb, 72 bytes, Stack size 16 bytes, it.o(i.USART3_IRQHandler))
    1604. 

  1604. <BR><BR>[Stack]<UL><LI>Max Depth = 112<LI>Call Chain = USART3_IRQHandler &rArr; AnaMotorData &rArr; __aeabi_dmul &rArr; _double_epilogue &rArr; _double_round
    1605. 

  1605. </UL>
    1606. 

  1606. <BR>[Calls]<UL><LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GetMotorData
    1607. 

  1607. <LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AnaMotorData
    1608. 

  1608. <LI><a href="#[ef]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_GetITStatus
    1609. 

  1609. <LI><a href="#[f0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_ClearITPendingBit
    1610. 

  1610. </UL>
    1611. 

  1611. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    1612. 

  1612. </UL>
    1613. 

  1613. <P><STRONG><a name="[51]"></a>USART6_IRQHandler</STRONG> (Thumb, 72 bytes, Stack size 16 bytes, it.o(i.USART6_IRQHandler))
    1614. 

  1614. <BR><BR>[Stack]<UL><LI>Max Depth = 112<LI>Call Chain = USART6_IRQHandler &rArr; AnaMotorData &rArr; __aeabi_dmul &rArr; _double_epilogue &rArr; _double_round
    1615. 

  1615. </UL>
    1616. 

  1616. <BR>[Calls]<UL><LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GetMotorData
    1617. 

  1617. <LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AnaMotorData
    1618. 

  1618. <LI><a href="#[ef]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_GetITStatus
    1619. 

  1619. <LI><a href="#[f0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_ClearITPendingBit
    1620. 

  1620. </UL>
    1621. 

  1621. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    1622. 

  1622. </UL>
    1623. 

  1623. <P><STRONG><a name="[f0]"></a>USART_ClearITPendingBit</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, stm32f4xx_usart.o(i.USART_ClearITPendingBit))
    1624. 

  1624. <BR><BR>[Called By]<UL><LI><a href="#[51]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART6_IRQHandler
    1625. 

  1625. <LI><a href="#[31]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART3_IRQHandler
    1626. 

  1626. <LI><a href="#[30]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART2_IRQHandler
    1627. 

  1627. <LI><a href="#[3f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART5_IRQHandler
    1628. 

  1628. </UL>
    1629. 

  1629. 

  1630. <P><STRONG><a name="[f8]"></a>USART_Cmd</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, stm32f4xx_usart.o(i.USART_Cmd))
    1631. 

  1631. <BR><BR>[Called By]<UL><LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_MOD_Config
    1632. 

  1632. </UL>
    1633. 

  1633. 

  1634. <P><STRONG><a name="[f1]"></a>USART_Config</STRONG> (Thumb, 174 bytes, Stack size 16 bytes, main.o(i.USART_Config))
    1635. 

  1635. <BR><BR>[Stack]<UL><LI>Max Depth = 96<LI>Call Chain = USART_Config &rArr; USART_MOD_Config &rArr; USART_Init &rArr; RCC_GetClocksFreq
    1636. 

  1636. </UL>
    1637. 

  1637. <BR>[Calls]<UL><LI><a href="#[f3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_NVIC_Config
    1638. 

  1638. <LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_MOD_Config
    1639. 

  1639. <LI><a href="#[f2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_GPIO_Config
    1640. 

  1640. </UL>
    1641. 

  1641. <BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1642. 

  1642. </UL>
    1643. 

  1643. 

  1644. <P><STRONG><a name="[f2]"></a>USART_GPIO_Config</STRONG> (Thumb, 64 bytes, Stack size 32 bytes, usart.o(i.USART_GPIO_Config))
    1645. 

  1645. <BR><BR>[Stack]<UL><LI>Max Depth = 52<LI>Call Chain = USART_GPIO_Config &rArr; GPIO_Init
    1646. 

  1646. </UL>
    1647. 

  1647. <BR>[Calls]<UL><LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_AHB1PeriphClockCmd
    1648. 

  1648. <LI><a href="#[a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_PinAFConfig
    1649. 

  1649. <LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_Init
    1650. 

  1650. </UL>
    1651. 

  1651. <BR>[Called By]<UL><LI><a href="#[f1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_Config
    1652. 

  1652. </UL>
    1653. 

  1653. 

  1654. <P><STRONG><a name="[ef]"></a>USART_GetITStatus</STRONG> (Thumb, 62 bytes, Stack size 16 bytes, stm32f4xx_usart.o(i.USART_GetITStatus))
    1655. 

  1655. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = USART_GetITStatus
    1656. 

  1656. </UL>
    1657. 

  1657. <BR>[Called By]<UL><LI><a href="#[51]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART6_IRQHandler
    1658. 

  1658. <LI><a href="#[31]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART3_IRQHandler
    1659. 

  1659. <LI><a href="#[30]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART2_IRQHandler
    1660. 

  1660. <LI><a href="#[3f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART5_IRQHandler
    1661. 

  1661. </UL>
    1662. 

  1662. 

  1663. <P><STRONG><a name="[f7]"></a>USART_ITConfig</STRONG> (Thumb, 48 bytes, Stack size 8 bytes, stm32f4xx_usart.o(i.USART_ITConfig))
    1664. 

  1664. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = USART_ITConfig
    1665. 

  1665. </UL>
    1666. 

  1666. <BR>[Called By]<UL><LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_MOD_Config
    1667. 

  1667. </UL>
    1668. 

  1668. 

  1669. <P><STRONG><a name="[f5]"></a>USART_Init</STRONG> (Thumb, 164 bytes, Stack size 32 bytes, stm32f4xx_usart.o(i.USART_Init))
    1670. 

  1670. <BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = USART_Init &rArr; RCC_GetClocksFreq
    1671. 

  1671. </UL>
    1672. 

  1672. <BR>[Calls]<UL><LI><a href="#[f6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_GetClocksFreq
    1673. 

  1673. </UL>
    1674. 

  1674. <BR>[Called By]<UL><LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_MOD_Config
    1675. 

  1675. </UL>
    1676. 

  1676. 

  1677. <P><STRONG><a name="[f4]"></a>USART_MOD_Config</STRONG> (Thumb, 84 bytes, Stack size 32 bytes, usart.o(i.USART_MOD_Config))
    1678. 

  1678. <BR><BR>[Stack]<UL><LI>Max Depth = 80<LI>Call Chain = USART_MOD_Config &rArr; USART_Init &rArr; RCC_GetClocksFreq
    1679. 

  1679. </UL>
    1680. 

  1680. <BR>[Calls]<UL><LI><a href="#[f5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_Init
    1681. 

  1681. <LI><a href="#[f7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_ITConfig
    1682. 

  1682. <LI><a href="#[f8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_Cmd
    1683. 

  1683. </UL>
    1684. 

  1684. <BR>[Called By]<UL><LI><a href="#[f1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_Config
    1685. 

  1685. </UL>
    1686. 

  1686. 

  1687. <P><STRONG><a name="[f3]"></a>USART_NVIC_Config</STRONG> (Thumb, 28 bytes, Stack size 8 bytes, usart.o(i.USART_NVIC_Config))
    1688. 

  1688. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = USART_NVIC_Config &rArr; NVIC_Init
    1689. 

  1689. </UL>
    1690. 

  1690. <BR>[Calls]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NVIC_Init
    1691. 

  1691. </UL>
    1692. 

  1692. <BR>[Called By]<UL><LI><a href="#[f1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_Config
    1693. 

  1693. </UL>
    1694. 

  1694. 

  1695. <P><STRONG><a name="[c7]"></a>USART_ReceiveData</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, stm32f4xx_usart.o(i.USART_ReceiveData))
    1696. 

  1696. <BR><BR>[Called By]<UL><LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GetMotorData
    1697. 

  1697. </UL>
    1698. 

  1698. 

  1699. <P><STRONG><a name="[10c]"></a>__scatterload_copy</STRONG> (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_copy), UNUSED)
    1700. 

  1700. 

  1701. <P><STRONG><a name="[10d]"></a>__scatterload_null</STRONG> (Thumb, 2 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_null), UNUSED)
    1702. 

  1702. 

  1703. <P><STRONG><a name="[10e]"></a>__scatterload_zeroinit</STRONG> (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_zeroinit), UNUSED)
    1704. 

  1704. 

  1705. <P><STRONG><a name="[fe]"></a>add_checksum_and_telemetry</STRONG> (Thumb, 38 bytes, Stack size 0 bytes, dshot.o(i.add_checksum_and_telemetry))
    1706. 

  1706. <BR><BR>[Called By]<UL><LI><a href="#[ed]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pwmWriteDigital
    1707. 

  1707. </UL>
    1708. 

  1708. 

  1709. <P><STRONG><a name="[f9]"></a>cycleCounterInit</STRONG> (Thumb, 62 bytes, Stack size 24 bytes, delay.o(i.cycleCounterInit))
    1710. 

  1710. <BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = cycleCounterInit &rArr; RCC_GetClocksFreq
    1711. 

  1711. </UL>
    1712. 

  1712. <BR>[Calls]<UL><LI><a href="#[f6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_GetClocksFreq
    1713. 

  1713. </UL>
    1714. 

  1714. <BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1715. 

  1715. </UL>
    1716. 

  1716. 

  1717. <P><STRONG><a name="[fa]"></a>delay_ms</STRONG> (Thumb, 32 bytes, Stack size 12 bytes, delay.o(i.delay_ms))
    1718. 

  1718. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = delay_ms &rArr; Micros
    1719. 

  1719. </UL>
    1720. 

  1720. <BR>[Calls]<UL><LI><a href="#[fb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Micros
    1721. 

  1721. </UL>
    1722. 

  1722. <BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1723. 

  1723. </UL>
    1724. 

  1724. 

  1725. <P><STRONG><a name="[96]"></a>get_crc8</STRONG> (Thumb, 32 bytes, Stack size 16 bytes, main.o(i.get_crc8))
    1726. 

  1726. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = get_crc8
    1727. 

  1727. </UL>
    1728. 

  1728. <BR>[Calls]<UL><LI><a href="#[fc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;update_crc8
    1729. 

  1729. </UL>
    1730. 

  1730. <BR>[Called By]<UL><LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AnaMotorData
    1731. 

  1731. </UL>
    1732. 

  1732. 

  1733. <P><STRONG><a name="[5c]"></a>main</STRONG> (Thumb, 88 bytes, Stack size 0 bytes, main.o(i.main))
    1734. 

  1734. <BR><BR>[Stack]<UL><LI>Max Depth = 116<LI>Call Chain = main &rArr; Dshot_Config &rArr; Dshot_TIM_Config &rArr; TIM_TimeBaseInit
    1735. 

  1735. </UL>
    1736. 

  1736. <BR>[Calls]<UL><LI><a href="#[fa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;delay_ms
    1737. 

  1737. <LI><a href="#[f9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;cycleCounterInit
    1738. 

  1738. <LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NVIC_PriorityGroupConfig
    1739. 

  1739. <LI><a href="#[cc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IWDG_Config
    1740. 

  1740. <LI><a href="#[f1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_Config
    1741. 

  1741. <LI><a href="#[e8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_500ms_Task
    1742. 

  1742. <LI><a href="#[e6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_20ms_Task
    1743. 

  1743. <LI><a href="#[e5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_1ms_Task
    1744. 

  1744. <LI><a href="#[e4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_10ms_Task
    1745. 

  1745. <LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_100ms_Task
    1746. 

  1746. <LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Overcurrent_Detection_Config
    1747. 

  1747. <LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Other_Task
    1748. 

  1748. <LI><a href="#[d1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LED_Config
    1749. 

  1749. <LI><a href="#[bf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Flash_ReadInf
    1750. 

  1750. <LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Dshot_Config
    1751. 

  1751. <LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_Config
    1752. 

  1752. <LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;All_motor_Config
    1753. 

  1753. <LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_Config
    1754. 

  1754. </UL>
    1755. 

  1755. <BR>[Address Reference Count : 1]<UL><LI> entry9a.o(.ARM.Collect$$$$0000000B)
    1756. 

  1756. </UL>
    1757. 

  1757. <P><STRONG><a name="[ed]"></a>pwmWriteDigital</STRONG> (Thumb, 228 bytes, Stack size 16 bytes, dshot.o(i.pwmWriteDigital))
    1758. 

  1758. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = pwmWriteDigital
    1759. 

  1759. </UL>
    1760. 

  1760. <BR>[Calls]<UL><LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_Cmd
    1761. 

  1761. <LI><a href="#[fe]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;add_checksum_and_telemetry
    1762. 

  1762. </UL>
    1763. 

  1763. <BR>[Called By]<UL><LI><a href="#[23]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM1_UP_TIM10_IRQHandler
    1764. 

  1764. </UL>
    1765. 

  1765. 

  1766. <P><STRONG><a name="[fc]"></a>update_crc8</STRONG> (Thumb, 30 bytes, Stack size 0 bytes, main.o(i.update_crc8))
    1767. 

  1767. <BR><BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;get_crc8
    1768. 

  1768. </UL>
    1769. 

  1769. <P>
    1770. 

  1770. <H3>
    1771. 

  1771. Local Symbols
    1772. 

  1772. </H3>
    1773. 

  1773. <P><STRONG><a name="[ea]"></a>SetSysClock</STRONG> (Thumb, 162 bytes, Stack size 12 bytes, system_stm32f4xx.o(i.SetSysClock))
    1774. 

  1774. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = SetSysClock
    1775. 

  1775. </UL>
    1776. 

  1776. <BR>[Called By]<UL><LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemInit
    1777. 

  1777. </UL>
    1778. 

  1778. <P>
    1779. 

  1779. <H3>
    1780. 

  1780. Undefined Global Symbols
    1781. 

  1781. </H3><HR></body></html>
    1782.