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N4Drive.htm

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
  1. <!doctype html public "-//w3c//dtd html 4.0 transitional//en">
    2. 

  2. <html><head>
    3. 

  3. <title>Static Call Graph - [.\Objects\N4Drive.axf]</title></head>
    4. 

  4. <body><HR>
    5. 

  5. <H1>Static Call Graph for image .\Objects\N4Drive.axf</H1><HR>
    6. 

  6. <BR><P>#&#060CALLGRAPH&#062# ARM Linker, 5060750: Last Updated: Fri Dec 09 15:39:02 2022
    7. 

  7. <BR><P>
    8. 

  8. <H3>Maximum Stack Usage =        280 bytes + Unknown(Cycles, Untraceable Function Pointers)</H3><H3>
    9. 

  9. Call chain for Maximum Stack Depth:</H3>
    10. 

  10. DMA2_Stream0_IRQHandler &rArr; Get_Temperature &rArr; __hardfp_log &rArr; __kernel_poly &rArr; __aeabi_dmul &rArr; _double_epilogue &rArr; _double_round
    11. 

  11. <P>
    12. 

  12. <H3>
    13. 

  13. Mutually Recursive functions
    14. 

  14. </H3> <LI><a href="#[2]">NMI_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[2]">NMI_Handler</a><BR>
    15. 

  15.  <LI><a href="#[4]">MemManage_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[4]">MemManage_Handler</a><BR>
    16. 

  16.  <LI><a href="#[5]">BusFault_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[5]">BusFault_Handler</a><BR>
    17. 

  17.  <LI><a href="#[6]">UsageFault_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[6]">UsageFault_Handler</a><BR>
    18. 

  18.  <LI><a href="#[7]">SVC_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[7]">SVC_Handler</a><BR>
    19. 

  19.  <LI><a href="#[8]">DebugMon_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[8]">DebugMon_Handler</a><BR>
    20. 

  20.  <LI><a href="#[9]">PendSV_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[9]">PendSV_Handler</a><BR>
    21. 

  21.  <LI><a href="#[1d]">ADC_IRQHandler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[1d]">ADC_IRQHandler</a><BR>
    22. 

  22.  <LI><a href="#[3]">HardFault_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[3]">HardFault_Handler</a><BR>
    23. 

  23. </UL>
    24. 

  24. <P>
    25. 

  25. <H3>
    26. 

  26. Function Pointers
    27. 

  27. </H3><UL>
    28. 

  28.  <LI><a href="#[1d]">ADC_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    29. 

  29.  <LI><a href="#[5]">BusFault_Handler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    30. 

  30.  <LI><a href="#[1f]">CAN1_RX0_IRQHandler</a> from it.o(i.CAN1_RX0_IRQHandler) referenced from startup_stm32f40_41xxx.o(RESET)
    31. 

  31.  <LI><a href="#[20]">CAN1_RX1_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    32. 

  32.  <LI><a href="#[21]">CAN1_SCE_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    33. 

  33.  <LI><a href="#[1e]">CAN1_TX_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    34. 

  34.  <LI><a href="#[4b]">CAN2_RX0_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    35. 

  35.  <LI><a href="#[4c]">CAN2_RX1_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    36. 

  36.  <LI><a href="#[4d]">CAN2_SCE_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    37. 

  37.  <LI><a href="#[4a]">CAN2_TX_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    38. 

  38.  <LI><a href="#[5a]">CRYP_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    39. 

  39.  <LI><a href="#[59]">DCMI_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    40. 

  40.  <LI><a href="#[16]">DMA1_Stream0_IRQHandler</a> from it.o(i.DMA1_Stream0_IRQHandler) referenced from startup_stm32f40_41xxx.o(RESET)
    41. 

  41.  <LI><a href="#[17]">DMA1_Stream1_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    42. 

  42.  <LI><a href="#[18]">DMA1_Stream2_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    43. 

  43.  <LI><a href="#[19]">DMA1_Stream3_IRQHandler</a> from it.o(i.DMA1_Stream3_IRQHandler) referenced from startup_stm32f40_41xxx.o(RESET)
    44. 

  44.  <LI><a href="#[1a]">DMA1_Stream4_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    45. 

  45.  <LI><a href="#[1b]">DMA1_Stream5_IRQHandler</a> from it.o(i.DMA1_Stream5_IRQHandler) referenced from startup_stm32f40_41xxx.o(RESET)
    46. 

  46.  <LI><a href="#[1c]">DMA1_Stream6_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    47. 

  47.  <LI><a href="#[3a]">DMA1_Stream7_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    48. 

  48.  <LI><a href="#[43]">DMA2_Stream0_IRQHandler</a> from it.o(i.DMA2_Stream0_IRQHandler) referenced from startup_stm32f40_41xxx.o(RESET)
    49. 

  49.  <LI><a href="#[44]">DMA2_Stream1_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    50. 

  50.  <LI><a href="#[45]">DMA2_Stream2_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    51. 

  51.  <LI><a href="#[46]">DMA2_Stream3_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    52. 

  52.  <LI><a href="#[47]">DMA2_Stream4_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    53. 

  53.  <LI><a href="#[4f]">DMA2_Stream5_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    54. 

  54.  <LI><a href="#[50]">DMA2_Stream6_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    55. 

  55.  <LI><a href="#[51]">DMA2_Stream7_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    56. 

  56.  <LI><a href="#[8]">DebugMon_Handler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    57. 

  57.  <LI><a href="#[48]">ETH_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    58. 

  58.  <LI><a href="#[49]">ETH_WKUP_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    59. 

  59.  <LI><a href="#[11]">EXTI0_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    60. 

  60.  <LI><a href="#[33]">EXTI15_10_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    61. 

  61.  <LI><a href="#[12]">EXTI1_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    62. 

  62.  <LI><a href="#[13]">EXTI2_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    63. 

  63.  <LI><a href="#[14]">EXTI3_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    64. 

  64.  <LI><a href="#[15]">EXTI4_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    65. 

  65.  <LI><a href="#[22]">EXTI9_5_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    66. 

  66.  <LI><a href="#[f]">FLASH_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    67. 

  67.  <LI><a href="#[5c]">FPU_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    68. 

  68.  <LI><a href="#[3b]">FSMC_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    69. 

  69.  <LI><a href="#[5b]">HASH_RNG_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    70. 

  70.  <LI><a href="#[3]">HardFault_Handler</a> from it.o(i.HardFault_Handler) referenced from startup_stm32f40_41xxx.o(RESET)
    71. 

  71.  <LI><a href="#[2b]">I2C1_ER_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    72. 

  72.  <LI><a href="#[2a]">I2C1_EV_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    73. 

  73.  <LI><a href="#[2d]">I2C2_ER_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    74. 

  74.  <LI><a href="#[2c]">I2C2_EV_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    75. 

  75.  <LI><a href="#[54]">I2C3_ER_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    76. 

  76.  <LI><a href="#[53]">I2C3_EV_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    77. 

  77.  <LI><a href="#[4]">MemManage_Handler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    78. 

  78.  <LI><a href="#[2]">NMI_Handler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    79. 

  79.  <LI><a href="#[4e]">OTG_FS_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    80. 

  80.  <LI><a href="#[35]">OTG_FS_WKUP_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    81. 

  81.  <LI><a href="#[56]">OTG_HS_EP1_IN_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    82. 

  82.  <LI><a href="#[55]">OTG_HS_EP1_OUT_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    83. 

  83.  <LI><a href="#[58]">OTG_HS_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    84. 

  84.  <LI><a href="#[57]">OTG_HS_WKUP_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    85. 

  85.  <LI><a href="#[c]">PVD_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    86. 

  86.  <LI><a href="#[9]">PendSV_Handler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    87. 

  87.  <LI><a href="#[62]">RCC_APB1PeriphClockCmd</a> from stm32f4xx_rcc.o(i.RCC_APB1PeriphClockCmd) referenced from main.o(i.ADC_Config)
    88. 

  88.  <LI><a href="#[62]">RCC_APB1PeriphClockCmd</a> from stm32f4xx_rcc.o(i.RCC_APB1PeriphClockCmd) referenced from main.o(i.Dshot_Config)
    89. 

  89.  <LI><a href="#[62]">RCC_APB1PeriphClockCmd</a> from stm32f4xx_rcc.o(i.RCC_APB1PeriphClockCmd) referenced from main.o(i.USART_Config)
    90. 

  90.  <LI><a href="#[65]">RCC_APB2PeriphClockCmd</a> from stm32f4xx_rcc.o(i.RCC_APB2PeriphClockCmd) referenced from main.o(i.Dshot_Config)
    91. 

  91.  <LI><a href="#[65]">RCC_APB2PeriphClockCmd</a> from stm32f4xx_rcc.o(i.RCC_APB2PeriphClockCmd) referenced from main.o(i.USART_Config)
    92. 

  92.  <LI><a href="#[10]">RCC_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    93. 

  93.  <LI><a href="#[34]">RTC_Alarm_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    94. 

  94.  <LI><a href="#[e]">RTC_WKUP_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    95. 

  95.  <LI><a href="#[1]">Reset_Handler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    96. 

  96.  <LI><a href="#[3c]">SDIO_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    97. 

  97.  <LI><a href="#[2e]">SPI1_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    98. 

  98.  <LI><a href="#[2f]">SPI2_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    99. 

  99.  <LI><a href="#[3e]">SPI3_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    100. 

  100.  <LI><a href="#[7]">SVC_Handler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    101. 

  101.  <LI><a href="#[a]">SysTick_Handler</a> from it.o(i.SysTick_Handler) referenced from startup_stm32f40_41xxx.o(RESET)
    102. 

  102.  <LI><a href="#[5e]">SystemInit</a> from system_stm32f4xx.o(i.SystemInit) referenced from startup_stm32f40_41xxx.o(.text)
    103. 

  103.  <LI><a href="#[d]">TAMP_STAMP_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    104. 

  104.  <LI><a href="#[23]">TIM1_BRK_TIM9_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    105. 

  105.  <LI><a href="#[26]">TIM1_CC_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    106. 

  106.  <LI><a href="#[25]">TIM1_TRG_COM_TIM11_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    107. 

  107.  <LI><a href="#[24]">TIM1_UP_TIM10_IRQHandler</a> from it.o(i.TIM1_UP_TIM10_IRQHandler) referenced from startup_stm32f40_41xxx.o(RESET)
    108. 

  108.  <LI><a href="#[27]">TIM2_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    109. 

  109.  <LI><a href="#[28]">TIM3_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    110. 

  110.  <LI><a href="#[29]">TIM4_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    111. 

  111.  <LI><a href="#[3d]">TIM5_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    112. 

  112.  <LI><a href="#[41]">TIM6_DAC_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    113. 

  113.  <LI><a href="#[42]">TIM7_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    114. 

  114.  <LI><a href="#[36]">TIM8_BRK_TIM12_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    115. 

  115.  <LI><a href="#[39]">TIM8_CC_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    116. 

  116.  <LI><a href="#[38]">TIM8_TRG_COM_TIM14_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    117. 

  117.  <LI><a href="#[37]">TIM8_UP_TIM13_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    118. 

  118.  <LI><a href="#[61]">TIM_OC1Init</a> from stm32f4xx_tim.o(i.TIM_OC1Init) referenced from main.o(i.ADC_Config)
    119. 

  119.  <LI><a href="#[61]">TIM_OC1Init</a> from stm32f4xx_tim.o(i.TIM_OC1Init) referenced from main.o(i.Dshot_Config)
    120. 

  120.  <LI><a href="#[60]">TIM_OC1PreloadConfig</a> from stm32f4xx_tim.o(i.TIM_OC1PreloadConfig) referenced from main.o(i.ADC_Config)
    121. 

  121.  <LI><a href="#[60]">TIM_OC1PreloadConfig</a> from stm32f4xx_tim.o(i.TIM_OC1PreloadConfig) referenced from main.o(i.Dshot_Config)
    122. 

  122.  <LI><a href="#[64]">TIM_OC2Init</a> from stm32f4xx_tim.o(i.TIM_OC2Init) referenced from main.o(i.Dshot_Config)
    123. 

  123.  <LI><a href="#[63]">TIM_OC2PreloadConfig</a> from stm32f4xx_tim.o(i.TIM_OC2PreloadConfig) referenced from main.o(i.Dshot_Config)
    124. 

  124.  <LI><a href="#[3f]">UART4_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    125. 

  125.  <LI><a href="#[40]">UART5_IRQHandler</a> from it.o(i.UART5_IRQHandler) referenced from startup_stm32f40_41xxx.o(RESET)
    126. 

  126.  <LI><a href="#[30]">USART1_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    127. 

  127.  <LI><a href="#[31]">USART2_IRQHandler</a> from it.o(i.USART2_IRQHandler) referenced from startup_stm32f40_41xxx.o(RESET)
    128. 

  128.  <LI><a href="#[32]">USART3_IRQHandler</a> from it.o(i.USART3_IRQHandler) referenced from startup_stm32f40_41xxx.o(RESET)
    129. 

  129.  <LI><a href="#[52]">USART6_IRQHandler</a> from it.o(i.USART6_IRQHandler) referenced from startup_stm32f40_41xxx.o(RESET)
    130. 

  130.  <LI><a href="#[6]">UsageFault_Handler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    131. 

  131.  <LI><a href="#[b]">WWDG_IRQHandler</a> from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET)
    132. 

  132.  <LI><a href="#[5f]">__main</a> from entry.o(.ARM.Collect$$$$00000000) referenced from startup_stm32f40_41xxx.o(.text)
    133. 

  133.  <LI><a href="#[5d]">main</a> from main.o(i.main) referenced from entry9a.o(.ARM.Collect$$$$0000000B)
    134. 

  134. </UL>
    135. 

  135. <P>
    136. 

  136. <H3>
    137. 

  137. Global Symbols
    138. 

  138. </H3>
    139. 

  139. <P><STRONG><a name="[5f]"></a>__main</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry.o(.ARM.Collect$$$$00000000))
    140. 

  140. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(.text)
    141. 

  141. </UL>
    142. 

  142. <P><STRONG><a name="[105]"></a>_main_stk</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry2.o(.ARM.Collect$$$$00000001))
    143. 

  143. 

  144. <P><STRONG><a name="[66]"></a>_main_scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))
    145. 

  145. <BR><BR>[Calls]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload
    146. 

  146. </UL>
    147. 

  147. 

  148. <P><STRONG><a name="[78]"></a>__main_after_scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))
    149. 

  149. <BR><BR>[Called By]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload
    150. 

  150. </UL>
    151. 

  151. 

  152. <P><STRONG><a name="[106]"></a>_main_clock</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry7b.o(.ARM.Collect$$$$00000008))
    153. 

  153. 

  154. <P><STRONG><a name="[107]"></a>_main_cpp_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry8b.o(.ARM.Collect$$$$0000000A))
    155. 

  155. 

  156. <P><STRONG><a name="[108]"></a>_main_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry9a.o(.ARM.Collect$$$$0000000B))
    157. 

  157. 

  158. <P><STRONG><a name="[109]"></a>__rt_final_cpp</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry10a.o(.ARM.Collect$$$$0000000D))
    159. 

  159. 

  160. <P><STRONG><a name="[10a]"></a>__rt_final_exit</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry11a.o(.ARM.Collect$$$$0000000F))
    161. 

  161. 

  162. <P><STRONG><a name="[1]"></a>Reset_Handler</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    163. 

  163. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    164. 

  164. </UL>
    165. 

  165. <P><STRONG><a name="[2]"></a>NMI_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    166. 

  166. <BR><BR>[Calls]<UL><LI><a href="#[2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NMI_Handler
    167. 

  167. </UL>
    168. 

  168. <BR>[Called By]<UL><LI><a href="#[2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NMI_Handler
    169. 

  169. </UL>
    170. 

  170. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    171. 

  171. </UL>
    172. 

  172. <P><STRONG><a name="[4]"></a>MemManage_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    173. 

  173. <BR><BR>[Calls]<UL><LI><a href="#[4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MemManage_Handler
    174. 

  174. </UL>
    175. 

  175. <BR>[Called By]<UL><LI><a href="#[4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MemManage_Handler
    176. 

  176. </UL>
    177. 

  177. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    178. 

  178. </UL>
    179. 

  179. <P><STRONG><a name="[5]"></a>BusFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    180. 

  180. <BR><BR>[Calls]<UL><LI><a href="#[5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BusFault_Handler
    181. 

  181. </UL>
    182. 

  182. <BR>[Called By]<UL><LI><a href="#[5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BusFault_Handler
    183. 

  183. </UL>
    184. 

  184. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    185. 

  185. </UL>
    186. 

  186. <P><STRONG><a name="[6]"></a>UsageFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    187. 

  187. <BR><BR>[Calls]<UL><LI><a href="#[6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UsageFault_Handler
    188. 

  188. </UL>
    189. 

  189. <BR>[Called By]<UL><LI><a href="#[6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UsageFault_Handler
    190. 

  190. </UL>
    191. 

  191. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    192. 

  192. </UL>
    193. 

  193. <P><STRONG><a name="[7]"></a>SVC_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    194. 

  194. <BR><BR>[Calls]<UL><LI><a href="#[7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SVC_Handler
    195. 

  195. </UL>
    196. 

  196. <BR>[Called By]<UL><LI><a href="#[7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SVC_Handler
    197. 

  197. </UL>
    198. 

  198. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    199. 

  199. </UL>
    200. 

  200. <P><STRONG><a name="[8]"></a>DebugMon_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    201. 

  201. <BR><BR>[Calls]<UL><LI><a href="#[8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DebugMon_Handler
    202. 

  202. </UL>
    203. 

  203. <BR>[Called By]<UL><LI><a href="#[8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DebugMon_Handler
    204. 

  204. </UL>
    205. 

  205. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    206. 

  206. </UL>
    207. 

  207. <P><STRONG><a name="[9]"></a>PendSV_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    208. 

  208. <BR><BR>[Calls]<UL><LI><a href="#[9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;PendSV_Handler
    209. 

  209. </UL>
    210. 

  210. <BR>[Called By]<UL><LI><a href="#[9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;PendSV_Handler
    211. 

  211. </UL>
    212. 

  212. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    213. 

  213. </UL>
    214. 

  214. <P><STRONG><a name="[1d]"></a>ADC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    215. 

  215. <BR><BR>[Calls]<UL><LI><a href="#[1d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_IRQHandler
    216. 

  216. </UL>
    217. 

  217. <BR>[Called By]<UL><LI><a href="#[1d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_IRQHandler
    218. 

  218. </UL>
    219. 

  219. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    220. 

  220. </UL>
    221. 

  221. <P><STRONG><a name="[20]"></a>CAN1_RX1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    222. 

  222. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    223. 

  223. </UL>
    224. 

  224. <P><STRONG><a name="[21]"></a>CAN1_SCE_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    225. 

  225. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    226. 

  226. </UL>
    227. 

  227. <P><STRONG><a name="[1e]"></a>CAN1_TX_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    228. 

  228. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    229. 

  229. </UL>
    230. 

  230. <P><STRONG><a name="[4b]"></a>CAN2_RX0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    231. 

  231. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    232. 

  232. </UL>
    233. 

  233. <P><STRONG><a name="[4c]"></a>CAN2_RX1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    234. 

  234. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    235. 

  235. </UL>
    236. 

  236. <P><STRONG><a name="[4d]"></a>CAN2_SCE_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    237. 

  237. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    238. 

  238. </UL>
    239. 

  239. <P><STRONG><a name="[4a]"></a>CAN2_TX_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    240. 

  240. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    241. 

  241. </UL>
    242. 

  242. <P><STRONG><a name="[5a]"></a>CRYP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    243. 

  243. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    244. 

  244. </UL>
    245. 

  245. <P><STRONG><a name="[59]"></a>DCMI_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    246. 

  246. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    247. 

  247. </UL>
    248. 

  248. <P><STRONG><a name="[17]"></a>DMA1_Stream1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    249. 

  249. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    250. 

  250. </UL>
    251. 

  251. <P><STRONG><a name="[18]"></a>DMA1_Stream2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    252. 

  252. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    253. 

  253. </UL>
    254. 

  254. <P><STRONG><a name="[1a]"></a>DMA1_Stream4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    255. 

  255. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    256. 

  256. </UL>
    257. 

  257. <P><STRONG><a name="[1c]"></a>DMA1_Stream6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    258. 

  258. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    259. 

  259. </UL>
    260. 

  260. <P><STRONG><a name="[3a]"></a>DMA1_Stream7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    261. 

  261. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    262. 

  262. </UL>
    263. 

  263. <P><STRONG><a name="[44]"></a>DMA2_Stream1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    264. 

  264. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    265. 

  265. </UL>
    266. 

  266. <P><STRONG><a name="[45]"></a>DMA2_Stream2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    267. 

  267. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    268. 

  268. </UL>
    269. 

  269. <P><STRONG><a name="[46]"></a>DMA2_Stream3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    270. 

  270. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    271. 

  271. </UL>
    272. 

  272. <P><STRONG><a name="[47]"></a>DMA2_Stream4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    273. 

  273. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    274. 

  274. </UL>
    275. 

  275. <P><STRONG><a name="[4f]"></a>DMA2_Stream5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    276. 

  276. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    277. 

  277. </UL>
    278. 

  278. <P><STRONG><a name="[50]"></a>DMA2_Stream6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    279. 

  279. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    280. 

  280. </UL>
    281. 

  281. <P><STRONG><a name="[51]"></a>DMA2_Stream7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    282. 

  282. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    283. 

  283. </UL>
    284. 

  284. <P><STRONG><a name="[48]"></a>ETH_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    285. 

  285. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    286. 

  286. </UL>
    287. 

  287. <P><STRONG><a name="[49]"></a>ETH_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    288. 

  288. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    289. 

  289. </UL>
    290. 

  290. <P><STRONG><a name="[11]"></a>EXTI0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    291. 

  291. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    292. 

  292. </UL>
    293. 

  293. <P><STRONG><a name="[33]"></a>EXTI15_10_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    294. 

  294. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    295. 

  295. </UL>
    296. 

  296. <P><STRONG><a name="[12]"></a>EXTI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    297. 

  297. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    298. 

  298. </UL>
    299. 

  299. <P><STRONG><a name="[13]"></a>EXTI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    300. 

  300. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    301. 

  301. </UL>
    302. 

  302. <P><STRONG><a name="[14]"></a>EXTI3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    303. 

  303. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    304. 

  304. </UL>
    305. 

  305. <P><STRONG><a name="[15]"></a>EXTI4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    306. 

  306. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    307. 

  307. </UL>
    308. 

  308. <P><STRONG><a name="[22]"></a>EXTI9_5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    309. 

  309. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    310. 

  310. </UL>
    311. 

  311. <P><STRONG><a name="[f]"></a>FLASH_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    312. 

  312. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    313. 

  313. </UL>
    314. 

  314. <P><STRONG><a name="[5c]"></a>FPU_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    315. 

  315. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    316. 

  316. </UL>
    317. 

  317. <P><STRONG><a name="[3b]"></a>FSMC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    318. 

  318. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    319. 

  319. </UL>
    320. 

  320. <P><STRONG><a name="[5b]"></a>HASH_RNG_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    321. 

  321. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    322. 

  322. </UL>
    323. 

  323. <P><STRONG><a name="[2b]"></a>I2C1_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    324. 

  324. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    325. 

  325. </UL>
    326. 

  326. <P><STRONG><a name="[2a]"></a>I2C1_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    327. 

  327. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    328. 

  328. </UL>
    329. 

  329. <P><STRONG><a name="[2d]"></a>I2C2_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    330. 

  330. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    331. 

  331. </UL>
    332. 

  332. <P><STRONG><a name="[2c]"></a>I2C2_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    333. 

  333. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    334. 

  334. </UL>
    335. 

  335. <P><STRONG><a name="[54]"></a>I2C3_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    336. 

  336. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    337. 

  337. </UL>
    338. 

  338. <P><STRONG><a name="[53]"></a>I2C3_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    339. 

  339. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    340. 

  340. </UL>
    341. 

  341. <P><STRONG><a name="[4e]"></a>OTG_FS_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    342. 

  342. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    343. 

  343. </UL>
    344. 

  344. <P><STRONG><a name="[35]"></a>OTG_FS_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    345. 

  345. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    346. 

  346. </UL>
    347. 

  347. <P><STRONG><a name="[56]"></a>OTG_HS_EP1_IN_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    348. 

  348. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    349. 

  349. </UL>
    350. 

  350. <P><STRONG><a name="[55]"></a>OTG_HS_EP1_OUT_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    351. 

  351. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    352. 

  352. </UL>
    353. 

  353. <P><STRONG><a name="[58]"></a>OTG_HS_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    354. 

  354. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    355. 

  355. </UL>
    356. 

  356. <P><STRONG><a name="[57]"></a>OTG_HS_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    357. 

  357. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    358. 

  358. </UL>
    359. 

  359. <P><STRONG><a name="[c]"></a>PVD_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    360. 

  360. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    361. 

  361. </UL>
    362. 

  362. <P><STRONG><a name="[10]"></a>RCC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    363. 

  363. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    364. 

  364. </UL>
    365. 

  365. <P><STRONG><a name="[34]"></a>RTC_Alarm_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    366. 

  366. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    367. 

  367. </UL>
    368. 

  368. <P><STRONG><a name="[e]"></a>RTC_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    369. 

  369. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    370. 

  370. </UL>
    371. 

  371. <P><STRONG><a name="[3c]"></a>SDIO_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    372. 

  372. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    373. 

  373. </UL>
    374. 

  374. <P><STRONG><a name="[2e]"></a>SPI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    375. 

  375. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    376. 

  376. </UL>
    377. 

  377. <P><STRONG><a name="[2f]"></a>SPI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    378. 

  378. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    379. 

  379. </UL>
    380. 

  380. <P><STRONG><a name="[3e]"></a>SPI3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    381. 

  381. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    382. 

  382. </UL>
    383. 

  383. <P><STRONG><a name="[d]"></a>TAMP_STAMP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    384. 

  384. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    385. 

  385. </UL>
    386. 

  386. <P><STRONG><a name="[23]"></a>TIM1_BRK_TIM9_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    387. 

  387. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    388. 

  388. </UL>
    389. 

  389. <P><STRONG><a name="[26]"></a>TIM1_CC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    390. 

  390. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    391. 

  391. </UL>
    392. 

  392. <P><STRONG><a name="[25]"></a>TIM1_TRG_COM_TIM11_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    393. 

  393. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    394. 

  394. </UL>
    395. 

  395. <P><STRONG><a name="[27]"></a>TIM2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    396. 

  396. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    397. 

  397. </UL>
    398. 

  398. <P><STRONG><a name="[28]"></a>TIM3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    399. 

  399. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    400. 

  400. </UL>
    401. 

  401. <P><STRONG><a name="[29]"></a>TIM4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    402. 

  402. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    403. 

  403. </UL>
    404. 

  404. <P><STRONG><a name="[3d]"></a>TIM5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    405. 

  405. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    406. 

  406. </UL>
    407. 

  407. <P><STRONG><a name="[41]"></a>TIM6_DAC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    408. 

  408. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    409. 

  409. </UL>
    410. 

  410. <P><STRONG><a name="[42]"></a>TIM7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    411. 

  411. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    412. 

  412. </UL>
    413. 

  413. <P><STRONG><a name="[36]"></a>TIM8_BRK_TIM12_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    414. 

  414. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    415. 

  415. </UL>
    416. 

  416. <P><STRONG><a name="[39]"></a>TIM8_CC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    417. 

  417. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    418. 

  418. </UL>
    419. 

  419. <P><STRONG><a name="[38]"></a>TIM8_TRG_COM_TIM14_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    420. 

  420. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    421. 

  421. </UL>
    422. 

  422. <P><STRONG><a name="[37]"></a>TIM8_UP_TIM13_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    423. 

  423. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    424. 

  424. </UL>
    425. 

  425. <P><STRONG><a name="[3f]"></a>UART4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    426. 

  426. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    427. 

  427. </UL>
    428. 

  428. <P><STRONG><a name="[30]"></a>USART1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    429. 

  429. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    430. 

  430. </UL>
    431. 

  431. <P><STRONG><a name="[b]"></a>WWDG_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text))
    432. 

  432. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    433. 

  433. </UL>
    434. 

  434. <P><STRONG><a name="[68]"></a>__aeabi_dadd</STRONG> (Thumb, 322 bytes, Stack size 48 bytes, dadd.o(.text))
    435. 

  435. <BR><BR>[Stack]<UL><LI>Max Depth = 88<LI>Call Chain = __aeabi_dadd &rArr; _double_epilogue &rArr; _double_round
    436. 

  436. </UL>
    437. 

  437. <BR>[Calls]<UL><LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_lasr
    438. 

  438. <LI><a href="#[69]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsl
    439. 

  439. <LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_round
    440. 

  440. <LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
    441. 

  441. </UL>
    442. 

  442. <BR>[Called By]<UL><LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dsub
    443. 

  443. <LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Motor_AD_correct
    444. 

  444. <LI><a href="#[6e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_drsub
    445. 

  445. <LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_Temperature
    446. 

  446. <LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Rec_Flash_Set
    447. 

  447. <LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__hardfp_log
    448. 

  448. <LI><a href="#[fe]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__kernel_poly
    449. 

  449. <LI><a href="#[f9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__mathlib_dbl_infnan
    450. 

  450. </UL>
    451. 

  451. 

  452. <P><STRONG><a name="[6d]"></a>__aeabi_dsub</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, dadd.o(.text))
    453. 

  453. <BR><BR>[Stack]<UL><LI>Max Depth = 88<LI>Call Chain = __aeabi_dsub &rArr; __aeabi_dadd &rArr; _double_epilogue &rArr; _double_round
    454. 

  454. </UL>
    455. 

  455. <BR>[Calls]<UL><LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
    456. 

  456. </UL>
    457. 

  457. <BR>[Called By]<UL><LI><a href="#[d0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Stall_check
    458. 

  458. <LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_Temperature
    459. 

  459. <LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__hardfp_log
    460. 

  460. </UL>
    461. 

  461. 

  462. <P><STRONG><a name="[6e]"></a>__aeabi_drsub</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, dadd.o(.text))
    463. 

  463. <BR><BR>[Stack]<UL><LI>Max Depth = 88<LI>Call Chain = __aeabi_drsub &rArr; __aeabi_dadd &rArr; _double_epilogue &rArr; _double_round
    464. 

  464. </UL>
    465. 

  465. <BR>[Calls]<UL><LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
    466. 

  466. </UL>
    467. 

  467. <BR>[Called By]<UL><LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_Temperature
    468. 

  468. <LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__hardfp_log
    469. 

  469. </UL>
    470. 

  470. 

  471. <P><STRONG><a name="[6f]"></a>__aeabi_dmul</STRONG> (Thumb, 228 bytes, Stack size 48 bytes, dmul.o(.text))
    472. 

  472. <BR><BR>[Stack]<UL><LI>Max Depth = 88<LI>Call Chain = __aeabi_dmul &rArr; _double_epilogue &rArr; _double_round
    473. 

  473. </UL>
    474. 

  474. <BR>[Calls]<UL><LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
    475. 

  475. </UL>
    476. 

  476. <BR>[Called By]<UL><LI><a href="#[d0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Stall_check
    477. 

  477. <LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Motor_AD_correct
    478. 

  478. <LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GetDShotValue
    479. 

  479. <LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AnaMotorData
    480. 

  480. <LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_Temperature
    481. 

  481. <LI><a href="#[43]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA2_Stream0_IRQHandler
    482. 

  482. <LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Rec_Flash_Set
    483. 

  483. <LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__hardfp_log
    484. 

  484. <LI><a href="#[fe]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__kernel_poly
    485. 

  485. </UL>
    486. 

  486. 

  487. <P><STRONG><a name="[70]"></a>__aeabi_ddiv</STRONG> (Thumb, 222 bytes, Stack size 32 bytes, ddiv.o(.text))
    488. 

  488. <BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = __aeabi_ddiv &rArr; _double_round
    489. 

  489. </UL>
    490. 

  490. <BR>[Calls]<UL><LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_round
    491. 

  491. </UL>
    492. 

  492. <BR>[Called By]<UL><LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_Temperature
    493. 

  493. <LI><a href="#[43]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA2_Stream0_IRQHandler
    494. 

  494. <LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__hardfp_log
    495. 

  495. <LI><a href="#[fb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__mathlib_dbl_invalid
    496. 

  496. <LI><a href="#[fc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__mathlib_dbl_divzero
    497. 

  497. </UL>
    498. 

  498. 

  499. <P><STRONG><a name="[71]"></a>__aeabi_i2d</STRONG> (Thumb, 34 bytes, Stack size 16 bytes, dflti.o(.text))
    500. 

  500. <BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = __aeabi_i2d &rArr; _double_epilogue &rArr; _double_round
    501. 

  501. </UL>
    502. 

  502. <BR>[Calls]<UL><LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
    503. 

  503. </UL>
    504. 

  504. <BR>[Called By]<UL><LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GetDShotValue
    505. 

  505. <LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Rec_Flash_Set
    506. 

  506. <LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__hardfp_log
    507. 

  507. </UL>
    508. 

  508. 

  509. <P><STRONG><a name="[72]"></a>__aeabi_ui2d</STRONG> (Thumb, 26 bytes, Stack size 16 bytes, dfltui.o(.text))
    510. 

  510. <BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = __aeabi_ui2d &rArr; _double_epilogue &rArr; _double_round
    511. 

  511. </UL>
    512. 

  512. <BR>[Calls]<UL><LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
    513. 

  513. </UL>
    514. 

  514. <BR>[Called By]<UL><LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AnaMotorData
    515. 

  515. <LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_Temperature
    516. 

  516. <LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Rec_Flash_Set
    517. 

  517. </UL>
    518. 

  518. 

  519. <P><STRONG><a name="[73]"></a>__aeabi_d2iz</STRONG> (Thumb, 62 bytes, Stack size 16 bytes, dfixi.o(.text))
    520. 

  520. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = __aeabi_d2iz
    521. 

  521. </UL>
    522. 

  522. <BR>[Calls]<UL><LI><a href="#[74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsr
    523. 

  523. </UL>
    524. 

  524. <BR>[Called By]<UL><LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GetDShotValue
    525. 

  525. </UL>
    526. 

  526. 

  527. <P><STRONG><a name="[75]"></a>__aeabi_d2uiz</STRONG> (Thumb, 50 bytes, Stack size 8 bytes, dfixui.o(.text))
    528. 

  528. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = __aeabi_d2uiz
    529. 

  529. </UL>
    530. 

  530. <BR>[Calls]<UL><LI><a href="#[74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsr
    531. 

  531. </UL>
    532. 

  532. <BR>[Called By]<UL><LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AnaMotorData
    533. 

  533. </UL>
    534. 

  534. 

  535. <P><STRONG><a name="[ad]"></a>__aeabi_f2d</STRONG> (Thumb, 38 bytes, Stack size 0 bytes, f2d.o(.text))
    536. 

  536. <BR><BR>[Called By]<UL><LI><a href="#[d0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Stall_check
    537. 

  537. <LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_Temperature
    538. 

  538. <LI><a href="#[43]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA2_Stream0_IRQHandler
    539. 

  539. </UL>
    540. 

  540. 

  541. <P><STRONG><a name="[fd]"></a>__aeabi_cdcmpeq</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, cdcmple.o(.text))
    542. 

  542. <BR><BR>[Called By]<UL><LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__hardfp_log
    543. 

  543. </UL>
    544. 

  544. 

  545. <P><STRONG><a name="[e0]"></a>__aeabi_cdcmple</STRONG> (Thumb, 48 bytes, Stack size 0 bytes, cdcmple.o(.text))
    546. 

  546. <BR><BR>[Called By]<UL><LI><a href="#[d0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Stall_check
    547. 

  547. </UL>
    548. 

  548. 

  549. <P><STRONG><a name="[df]"></a>__aeabi_cdrcmple</STRONG> (Thumb, 48 bytes, Stack size 0 bytes, cdrcmple.o(.text))
    550. 

  550. <BR><BR>[Called By]<UL><LI><a href="#[d0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Stall_check
    551. 

  551. </UL>
    552. 

  552. 

  553. <P><STRONG><a name="[76]"></a>__aeabi_d2f</STRONG> (Thumb, 56 bytes, Stack size 8 bytes, d2f.o(.text))
    554. 

  554. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = __aeabi_d2f
    555. 

  555. </UL>
    556. 

  556. <BR>[Calls]<UL><LI><a href="#[77]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_float_round
    557. 

  557. </UL>
    558. 

  558. <BR>[Called By]<UL><LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_Temperature
    559. 

  559. <LI><a href="#[43]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA2_Stream0_IRQHandler
    560. 

  560. <LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Rec_Flash_Set
    561. 

  561. </UL>
    562. 

  562. 

  563. <P><STRONG><a name="[69]"></a>__aeabi_llsl</STRONG> (Thumb, 30 bytes, Stack size 0 bytes, llshl.o(.text))
    564. 

  564. <BR><BR>[Called By]<UL><LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
    565. 

  565. <LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
    566. 

  566. </UL>
    567. 

  567. 

  568. <P><STRONG><a name="[10b]"></a>_ll_shift_l</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, llshl.o(.text), UNUSED)
    569. 

  569. 

  570. <P><STRONG><a name="[74]"></a>__aeabi_llsr</STRONG> (Thumb, 32 bytes, Stack size 0 bytes, llushr.o(.text))
    571. 

  571. <BR><BR>[Called By]<UL><LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_d2uiz
    572. 

  572. <LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_d2iz
    573. 

  573. <LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
    574. 

  574. </UL>
    575. 

  575. 

  576. <P><STRONG><a name="[10c]"></a>_ll_ushift_r</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, llushr.o(.text), UNUSED)
    577. 

  577. 

  578. <P><STRONG><a name="[6a]"></a>__aeabi_lasr</STRONG> (Thumb, 36 bytes, Stack size 0 bytes, llsshr.o(.text))
    579. 

  579. <BR><BR>[Called By]<UL><LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
    580. 

  580. </UL>
    581. 

  581. 

  582. <P><STRONG><a name="[10d]"></a>_ll_sshift_r</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, llsshr.o(.text), UNUSED)
    583. 

  583. 

  584. <P><STRONG><a name="[10e]"></a>__I$use$fp</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, iusefp.o(.text), UNUSED)
    585. 

  585. 

  586. <P><STRONG><a name="[77]"></a>_float_round</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, fepilogue.o(.text))
    587. 

  587. <BR><BR>[Called By]<UL><LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_d2f
    588. 

  588. </UL>
    589. 

  589. 

  590. <P><STRONG><a name="[10f]"></a>_float_epilogue</STRONG> (Thumb, 92 bytes, Stack size 4 bytes, fepilogue.o(.text), UNUSED)
    591. 

  591. 

  592. <P><STRONG><a name="[6c]"></a>_double_round</STRONG> (Thumb, 30 bytes, Stack size 8 bytes, depilogue.o(.text))
    593. 

  593. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = _double_round
    594. 

  594. </UL>
    595. 

  595. <BR>[Called By]<UL><LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
    596. 

  596. <LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_ddiv
    597. 

  597. <LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
    598. 

  598. </UL>
    599. 

  599. 

  600. <P><STRONG><a name="[6b]"></a>_double_epilogue</STRONG> (Thumb, 156 bytes, Stack size 32 bytes, depilogue.o(.text))
    601. 

  601. <BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = _double_epilogue &rArr; _double_round
    602. 

  602. </UL>
    603. 

  603. <BR>[Calls]<UL><LI><a href="#[74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsr
    604. 

  604. <LI><a href="#[69]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsl
    605. 

  605. <LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_round
    606. 

  606. </UL>
    607. 

  607. <BR>[Called By]<UL><LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_ui2d
    608. 

  608. <LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_i2d
    609. 

  609. <LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dmul
    610. 

  610. <LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
    611. 

  611. </UL>
    612. 

  612. 

  613. <P><STRONG><a name="[67]"></a>__scatterload</STRONG> (Thumb, 28 bytes, Stack size 0 bytes, init.o(.text))
    614. 

  614. <BR><BR>[Calls]<UL><LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__main_after_scatterload
    615. 

  615. </UL>
    616. 

  616. <BR>[Called By]<UL><LI><a href="#[66]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_main_scatterload
    617. 

  617. </UL>
    618. 

  618. 

  619. <P><STRONG><a name="[110]"></a>__scatterload_rt2</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, init.o(.text), UNUSED)
    620. 

  620. 

  621. <P><STRONG><a name="[8d]"></a>ADC_Cmd</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, stm32f4xx_adc.o(i.ADC_Cmd))
    622. 

  622. <BR><BR>[Called By]<UL><LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_Mode_Config
    623. 

  623. </UL>
    624. 

  624. 

  625. <P><STRONG><a name="[88]"></a>ADC_CommonInit</STRONG> (Thumb, 34 bytes, Stack size 8 bytes, stm32f4xx_adc.o(i.ADC_CommonInit))
    626. 

  626. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = ADC_CommonInit
    627. 

  627. </UL>
    628. 

  628. <BR>[Called By]<UL><LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_Mode_Config
    629. 

  629. </UL>
    630. 

  630. 

  631. <P><STRONG><a name="[79]"></a>ADC_Config</STRONG> (Thumb, 116 bytes, Stack size 32 bytes, main.o(i.ADC_Config))
    632. 

  632. <BR><BR>[Stack]<UL><LI>Max Depth = 124<LI>Call Chain = ADC_Config &rArr; ADC_DMA_Config &rArr; DMA_Init
    633. 

  633. </UL>
    634. 

  634. <BR>[Calls]<UL><LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_TIM_Config
    635. 

  635. <LI><a href="#[7c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_NVIC_Config
    636. 

  636. <LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_Mode_Config
    637. 

  637. <LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_GPIO_Config
    638. 

  638. <LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_DMA_Config
    639. 

  639. </UL>
    640. 

  640. <BR>[Called By]<UL><LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    641. 

  641. </UL>
    642. 

  642. 

  643. <P><STRONG><a name="[8c]"></a>ADC_DMACmd</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, stm32f4xx_adc.o(i.ADC_DMACmd))
    644. 

  644. <BR><BR>[Called By]<UL><LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_Mode_Config
    645. 

  645. </UL>
    646. 

  646. 

  647. <P><STRONG><a name="[8b]"></a>ADC_DMARequestAfterLastTransferCmd</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, stm32f4xx_adc.o(i.ADC_DMARequestAfterLastTransferCmd))
    648. 

  648. <BR><BR>[Called By]<UL><LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_Mode_Config
    649. 

  649. </UL>
    650. 

  650. 

  651. <P><STRONG><a name="[7d]"></a>ADC_DMA_Config</STRONG> (Thumb, 124 bytes, Stack size 80 bytes, adc.o(i.ADC_DMA_Config))
    652. 

  652. <BR><BR>[Stack]<UL><LI>Max Depth = 92<LI>Call Chain = ADC_DMA_Config &rArr; DMA_Init
    653. 

  653. </UL>
    654. 

  654. <BR>[Calls]<UL><LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_DoubleBufferModeConfig
    655. 

  655. <LI><a href="#[82]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_DoubleBufferModeCmd
    656. 

  656. <LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_AHB1PeriphClockCmd
    657. 

  657. <LI><a href="#[80]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_Init
    658. 

  658. <LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_ITConfig
    659. 

  659. <LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_Cmd
    660. 

  660. <LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_ClearITPendingBit
    661. 

  661. </UL>
    662. 

  662. <BR>[Called By]<UL><LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_Config
    663. 

  663. </UL>
    664. 

  664. 

  665. <P><STRONG><a name="[7a]"></a>ADC_GPIO_Config</STRONG> (Thumb, 36 bytes, Stack size 24 bytes, adc.o(i.ADC_GPIO_Config))
    666. 

  666. <BR><BR>[Stack]<UL><LI>Max Depth = 44<LI>Call Chain = ADC_GPIO_Config &rArr; GPIO_Init
    667. 

  667. </UL>
    668. 

  668. <BR>[Calls]<UL><LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_AHB1PeriphClockCmd
    669. 

  669. <LI><a href="#[86]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_Init
    670. 

  670. </UL>
    671. 

  671. <BR>[Called By]<UL><LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_Config
    672. 

  672. </UL>
    673. 

  673. 

  674. <P><STRONG><a name="[89]"></a>ADC_Init</STRONG> (Thumb, 66 bytes, Stack size 12 bytes, stm32f4xx_adc.o(i.ADC_Init))
    675. 

  675. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = ADC_Init
    676. 

  676. </UL>
    677. 

  677. <BR>[Called By]<UL><LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_Mode_Config
    678. 

  678. </UL>
    679. 

  679. 

  680. <P><STRONG><a name="[7b]"></a>ADC_Mode_Config</STRONG> (Thumb, 144 bytes, Stack size 64 bytes, adc.o(i.ADC_Mode_Config))
    681. 

  681. <BR><BR>[Stack]<UL><LI>Max Depth = 80<LI>Call Chain = ADC_Mode_Config &rArr; ADC_RegularChannelConfig
    682. 

  682. </UL>
    683. 

  683. <BR>[Calls]<UL><LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_APB2PeriphResetCmd
    684. 

  684. <LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_RegularChannelConfig
    685. 

  685. <LI><a href="#[89]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_Init
    686. 

  686. <LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_DMARequestAfterLastTransferCmd
    687. 

  687. <LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_DMACmd
    688. 

  688. <LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_CommonInit
    689. 

  689. <LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_Cmd
    690. 

  690. <LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_APB2PeriphClockCmd
    691. 

  691. </UL>
    692. 

  692. <BR>[Called By]<UL><LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_Config
    693. 

  693. </UL>
    694. 

  694. 

  695. <P><STRONG><a name="[7c]"></a>ADC_NVIC_Config</STRONG> (Thumb, 28 bytes, Stack size 8 bytes, adc.o(i.ADC_NVIC_Config))
    696. 

  696. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = ADC_NVIC_Config &rArr; NVIC_Init
    697. 

  697. </UL>
    698. 

  698. <BR>[Calls]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NVIC_Init
    699. 

  699. </UL>
    700. 

  700. <BR>[Called By]<UL><LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_Config
    701. 

  701. </UL>
    702. 

  702. 

  703. <P><STRONG><a name="[8a]"></a>ADC_RegularChannelConfig</STRONG> (Thumb, 116 bytes, Stack size 16 bytes, stm32f4xx_adc.o(i.ADC_RegularChannelConfig))
    704. 

  704. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = ADC_RegularChannelConfig
    705. 

  705. </UL>
    706. 

  706. <BR>[Called By]<UL><LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_Mode_Config
    707. 

  707. </UL>
    708. 

  708. 

  709. <P><STRONG><a name="[7e]"></a>ADC_TIM_Config</STRONG> (Thumb, 114 bytes, Stack size 56 bytes, adc.o(i.ADC_TIM_Config))
    710. 

  710. <BR><BR>[Stack]<UL><LI>Max Depth = 68<LI>Call Chain = ADC_TIM_Config &rArr; TIM_TimeBaseInit
    711. 

  711. </UL>
    712. 

  712. <BR>[Calls]<UL><LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_CtrlPWMOutputs
    713. 

  713. <LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_TimeBaseInit
    714. 

  714. <LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_SelectOutputTrigger
    715. 

  715. <LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_Cmd
    716. 

  716. </UL>
    717. 

  717. <BR>[Called By]<UL><LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_Config
    718. 

  718. </UL>
    719. 

  719. 

  720. <P><STRONG><a name="[93]"></a>All_motor_Config</STRONG> (Thumb, 118 bytes, Stack size 4 bytes, main.o(i.All_motor_Config))
    721. 

  721. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = All_motor_Config
    722. 

  722. </UL>
    723. 

  723. <BR>[Calls]<UL><LI><a href="#[94]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Single_Motor_Config
    724. 

  724. </UL>
    725. 

  725. <BR>[Called By]<UL><LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    726. 

  726. </UL>
    727. 

  727. 

  728. <P><STRONG><a name="[95]"></a>AnaMotorData</STRONG> (Thumb, 148 bytes, Stack size 8 bytes, main.o(i.AnaMotorData))
    729. 

  729. <BR><BR>[Stack]<UL><LI>Max Depth = 96<LI>Call Chain = AnaMotorData &rArr; __aeabi_dmul &rArr; _double_epilogue &rArr; _double_round
    730. 

  730. </UL>
    731. 

  731. <BR>[Calls]<UL><LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_ui2d
    732. 

  732. <LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dmul
    733. 

  733. <LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_d2uiz
    734. 

  734. <LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;get_crc8
    735. 

  735. <LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Equation
    736. 

  736. </UL>
    737. 

  737. <BR>[Called By]<UL><LI><a href="#[52]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART6_IRQHandler
    738. 

  738. <LI><a href="#[32]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART3_IRQHandler
    739. 

  739. <LI><a href="#[31]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART2_IRQHandler
    740. 

  740. <LI><a href="#[40]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART5_IRQHandler
    741. 

  741. </UL>
    742. 

  742. 

  743. <P><STRONG><a name="[1f]"></a>CAN1_RX0_IRQHandler</STRONG> (Thumb, 542 bytes, Stack size 48 bytes, it.o(i.CAN1_RX0_IRQHandler))
    744. 

  744. <BR><BR>[Stack]<UL><LI>Max Depth = 168<LI>Call Chain = CAN1_RX0_IRQHandler &rArr; Rec_Flash_Set &rArr; __aeabi_dmul &rArr; _double_epilogue &rArr; _double_round
    745. 

  745. </UL>
    746. 

  746. <BR>[Calls]<UL><LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IWDG_Feed
    747. 

  747. <LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SoftReset
    748. 

  748. <LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GetDShotValue
    749. 

  749. <LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ResearchProtection
    750. 

  750. <LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Rec_Flash_Set
    751. 

  751. <LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_Receive_Msg
    752. 

  752. </UL>
    753. 

  753. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    754. 

  754. </UL>
    755. 

  755. <P><STRONG><a name="[98]"></a>CAN1_Receive_Msg</STRONG> (Thumb, 64 bytes, Stack size 40 bytes, can.o(i.CAN1_Receive_Msg))
    756. 

  756. <BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = CAN1_Receive_Msg &rArr; CAN_Receive
    757. 

  757. </UL>
    758. 

  758. <BR>[Calls]<UL><LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_Receive
    759. 

  759. <LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_MessagePending
    760. 

  760. </UL>
    761. 

  761. <BR>[Called By]<UL><LI><a href="#[1f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_RX0_IRQHandler
    762. 

  762. </UL>
    763. 

  763. 

  764. <P><STRONG><a name="[a0]"></a>CAN1_Send_Msg</STRONG> (Thumb, 92 bytes, Stack size 40 bytes, can.o(i.CAN1_Send_Msg))
    765. 

  765. <BR><BR>[Stack]<UL><LI>Max Depth = 52<LI>Call Chain = CAN1_Send_Msg &rArr; CAN_Transmit
    766. 

  766. </UL>
    767. 

  767. <BR>[Calls]<UL><LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_TransmitStatus
    768. 

  768. <LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_Transmit
    769. 

  769. </UL>
    770. 

  770. <BR>[Called By]<UL><LI><a href="#[dd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_Flash_Set
    771. 

  771. <LI><a href="#[dc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_CAN_DATA6
    772. 

  772. <LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_CAN_DATA5
    773. 

  773. <LI><a href="#[da]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_CAN_DATA4
    774. 

  774. <LI><a href="#[d9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_CAN_DATA3
    775. 

  775. <LI><a href="#[d8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_CAN_DATA2
    776. 

  776. <LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_CAN_DATA1
    777. 

  777. </UL>
    778. 

  778. 

  779. <P><STRONG><a name="[a3]"></a>CAN_Config</STRONG> (Thumb, 64 bytes, Stack size 16 bytes, main.o(i.CAN_Config))
    780. 

  780. <BR><BR>[Stack]<UL><LI>Max Depth = 92<LI>Call Chain = CAN_Config &rArr; CAN_Mod_Config &rArr; CAN_FilterInit
    781. 

  781. </UL>
    782. 

  782. <BR>[Calls]<UL><LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_NVIC_Config
    783. 

  783. <LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_Mod_Config
    784. 

  784. <LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_GPIO_Config
    785. 

  785. </UL>
    786. 

  786. <BR>[Called By]<UL><LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    787. 

  787. </UL>
    788. 

  788. 

  789. <P><STRONG><a name="[a9]"></a>CAN_FilterInit</STRONG> (Thumb, 194 bytes, Stack size 20 bytes, stm32f4xx_can.o(i.CAN_FilterInit))
    790. 

  790. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = CAN_FilterInit
    791. 

  791. </UL>
    792. 

  792. <BR>[Called By]<UL><LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_Mod_Config
    793. 

  793. </UL>
    794. 

  794. 

  795. <P><STRONG><a name="[a4]"></a>CAN_GPIO_Config</STRONG> (Thumb, 66 bytes, Stack size 32 bytes, can.o(i.CAN_GPIO_Config))
    796. 

  796. <BR><BR>[Stack]<UL><LI>Max Depth = 52<LI>Call Chain = CAN_GPIO_Config &rArr; GPIO_Init
    797. 

  797. </UL>
    798. 

  798. <BR>[Calls]<UL><LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_AHB1PeriphClockCmd
    799. 

  799. <LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_PinAFConfig
    800. 

  800. <LI><a href="#[86]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_Init
    801. 

  801. </UL>
    802. 

  802. <BR>[Called By]<UL><LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_Config
    803. 

  803. </UL>
    804. 

  804. 

  805. <P><STRONG><a name="[aa]"></a>CAN_ITConfig</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, stm32f4xx_can.o(i.CAN_ITConfig))
    806. 

  806. <BR><BR>[Called By]<UL><LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_Mod_Config
    807. 

  807. </UL>
    808. 

  808. 

  809. <P><STRONG><a name="[a8]"></a>CAN_Init</STRONG> (Thumb, 232 bytes, Stack size 8 bytes, stm32f4xx_can.o(i.CAN_Init))
    810. 

  810. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = CAN_Init
    811. 

  811. </UL>
    812. 

  812. <BR>[Called By]<UL><LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_Mod_Config
    813. 

  813. </UL>
    814. 

  814. 

  815. <P><STRONG><a name="[9e]"></a>CAN_MessagePending</STRONG> (Thumb, 22 bytes, Stack size 0 bytes, stm32f4xx_can.o(i.CAN_MessagePending))
    816. 

  816. <BR><BR>[Called By]<UL><LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_Receive_Msg
    817. 

  817. </UL>
    818. 

  818. 

  819. <P><STRONG><a name="[a6]"></a>CAN_Mod_Config</STRONG> (Thumb, 158 bytes, Stack size 56 bytes, can.o(i.CAN_Mod_Config))
    820. 

  820. <BR><BR>[Stack]<UL><LI>Max Depth = 76<LI>Call Chain = CAN_Mod_Config &rArr; CAN_FilterInit
    821. 

  821. </UL>
    822. 

  822. <BR>[Calls]<UL><LI><a href="#[62]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_APB1PeriphClockCmd
    823. 

  823. <LI><a href="#[a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_Init
    824. 

  824. <LI><a href="#[aa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_ITConfig
    825. 

  825. <LI><a href="#[a9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_FilterInit
    826. 

  826. </UL>
    827. 

  827. <BR>[Called By]<UL><LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_Config
    828. 

  828. </UL>
    829. 

  829. 

  830. <P><STRONG><a name="[a5]"></a>CAN_NVIC_Config</STRONG> (Thumb, 28 bytes, Stack size 8 bytes, can.o(i.CAN_NVIC_Config))
    831. 

  831. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = CAN_NVIC_Config &rArr; NVIC_Init
    832. 

  832. </UL>
    833. 

  833. <BR>[Calls]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NVIC_Init
    834. 

  834. </UL>
    835. 

  835. <BR>[Called By]<UL><LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_Config
    836. 

  836. </UL>
    837. 

  837. 

  838. <P><STRONG><a name="[9f]"></a>CAN_Receive</STRONG> (Thumb, 142 bytes, Stack size 8 bytes, stm32f4xx_can.o(i.CAN_Receive))
    839. 

  839. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = CAN_Receive
    840. 

  840. </UL>
    841. 

  841. <BR>[Called By]<UL><LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_Receive_Msg
    842. 

  842. </UL>
    843. 

  843. 

  844. <P><STRONG><a name="[a1]"></a>CAN_Transmit</STRONG> (Thumb, 164 bytes, Stack size 12 bytes, stm32f4xx_can.o(i.CAN_Transmit))
    845. 

  845. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = CAN_Transmit
    846. 

  846. </UL>
    847. 

  847. <BR>[Called By]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_Send_Msg
    848. 

  848. </UL>
    849. 

  849. 

  850. <P><STRONG><a name="[a2]"></a>CAN_TransmitStatus</STRONG> (Thumb, 88 bytes, Stack size 0 bytes, stm32f4xx_can.o(i.CAN_TransmitStatus))
    851. 

  851. <BR><BR>[Called By]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_Send_Msg
    852. 

  852. </UL>
    853. 

  853. 

  854. <P><STRONG><a name="[16]"></a>DMA1_Stream0_IRQHandler</STRONG> (Thumb, 40 bytes, Stack size 16 bytes, it.o(i.DMA1_Stream0_IRQHandler))
    855. 

  855. <BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = DMA1_Stream0_IRQHandler &rArr; DMA_GetITStatus
    856. 

  856. </UL>
    857. 

  857. <BR>[Calls]<UL><LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_Cmd
    858. 

  858. <LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_ClearITPendingBit
    859. 

  859. <LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_GetITStatus
    860. 

  860. </UL>
    861. 

  861. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    862. 

  862. </UL>
    863. 

  863. <P><STRONG><a name="[19]"></a>DMA1_Stream3_IRQHandler</STRONG> (Thumb, 40 bytes, Stack size 16 bytes, it.o(i.DMA1_Stream3_IRQHandler))
    864. 

  864. <BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = DMA1_Stream3_IRQHandler &rArr; DMA_GetITStatus
    865. 

  865. </UL>
    866. 

  866. <BR>[Calls]<UL><LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_Cmd
    867. 

  867. <LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_ClearITPendingBit
    868. 

  868. <LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_GetITStatus
    869. 

  869. </UL>
    870. 

  870. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    871. 

  871. </UL>
    872. 

  872. <P><STRONG><a name="[1b]"></a>DMA1_Stream5_IRQHandler</STRONG> (Thumb, 40 bytes, Stack size 16 bytes, it.o(i.DMA1_Stream5_IRQHandler))
    873. 

  873. <BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = DMA1_Stream5_IRQHandler &rArr; DMA_GetITStatus
    874. 

  874. </UL>
    875. 

  875. <BR>[Calls]<UL><LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_Cmd
    876. 

  876. <LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_ClearITPendingBit
    877. 

  877. <LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_GetITStatus
    878. 

  878. </UL>
    879. 

  879. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    880. 

  880. </UL>
    881. 

  881. <P><STRONG><a name="[43]"></a>DMA2_Stream0_IRQHandler</STRONG> (Thumb, 398 bytes, Stack size 48 bytes, it.o(i.DMA2_Stream0_IRQHandler))
    882. 

  882. <BR><BR>[Stack]<UL><LI>Max Depth = 280<LI>Call Chain = DMA2_Stream0_IRQHandler &rArr; Get_Temperature &rArr; __hardfp_log &rArr; __kernel_poly &rArr; __aeabi_dmul &rArr; _double_epilogue &rArr; _double_round
    883. 

  883. </UL>
    884. 

  884. <BR>[Calls]<UL><LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_ClearITPendingBit
    885. 

  885. <LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_f2d
    886. 

  886. <LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dmul
    887. 

  887. <LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_ddiv
    888. 

  888. <LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_Temperature
    889. 

  889. <LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_GetITStatus
    890. 

  890. <LI><a href="#[ac]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_GetCurrentMemoryTarget
    891. 

  891. <LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_d2f
    892. 

  892. </UL>
    893. 

  893. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    894. 

  894. </UL>
    895. 

  895. <P><STRONG><a name="[83]"></a>DMA_ClearITPendingBit</STRONG> (Thumb, 32 bytes, Stack size 0 bytes, stm32f4xx_dma.o(i.DMA_ClearITPendingBit))
    896. 

  896. <BR><BR>[Called By]<UL><LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DSHOT_DMA_Config
    897. 

  897. <LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_DMA_Config
    898. 

  898. <LI><a href="#[43]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA2_Stream0_IRQHandler
    899. 

  899. <LI><a href="#[1b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA1_Stream5_IRQHandler
    900. 

  900. <LI><a href="#[19]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA1_Stream3_IRQHandler
    901. 

  901. <LI><a href="#[16]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA1_Stream0_IRQHandler
    902. 

  902. </UL>
    903. 

  903. 

  904. <P><STRONG><a name="[85]"></a>DMA_Cmd</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, stm32f4xx_dma.o(i.DMA_Cmd))
    905. 

  905. <BR><BR>[Called By]<UL><LI><a href="#[ec]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pwmWriteDigital
    906. 

  906. <LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DSHOT_DMA_Config
    907. 

  907. <LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_DMA_Config
    908. 

  908. <LI><a href="#[1b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA1_Stream5_IRQHandler
    909. 

  909. <LI><a href="#[19]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA1_Stream3_IRQHandler
    910. 

  910. <LI><a href="#[16]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA1_Stream0_IRQHandler
    911. 

  911. </UL>
    912. 

  912. 

  913. <P><STRONG><a name="[b0]"></a>DMA_DeInit</STRONG> (Thumb, 272 bytes, Stack size 28 bytes, stm32f4xx_dma.o(i.DMA_DeInit))
    914. 

  914. <BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = DMA_DeInit
    915. 

  915. </UL>
    916. 

  916. <BR>[Called By]<UL><LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DSHOT_DMA_Config
    917. 

  917. </UL>
    918. 

  918. 

  919. <P><STRONG><a name="[82]"></a>DMA_DoubleBufferModeCmd</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, stm32f4xx_dma.o(i.DMA_DoubleBufferModeCmd))
    920. 

  920. <BR><BR>[Called By]<UL><LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_DMA_Config
    921. 

  921. </UL>
    922. 

  922. 

  923. <P><STRONG><a name="[81]"></a>DMA_DoubleBufferModeConfig</STRONG> (Thumb, 22 bytes, Stack size 0 bytes, stm32f4xx_dma.o(i.DMA_DoubleBufferModeConfig))
    924. 

  924. <BR><BR>[Called By]<UL><LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_DMA_Config
    925. 

  925. </UL>
    926. 

  926. 

  927. <P><STRONG><a name="[b1]"></a>DMA_GetCmdStatus</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, stm32f4xx_dma.o(i.DMA_GetCmdStatus))
    928. 

  928. <BR><BR>[Called By]<UL><LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DSHOT_DMA_Config
    929. 

  929. </UL>
    930. 

  930. 

  931. <P><STRONG><a name="[ac]"></a>DMA_GetCurrentMemoryTarget</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, stm32f4xx_dma.o(i.DMA_GetCurrentMemoryTarget))
    932. 

  932. <BR><BR>[Called By]<UL><LI><a href="#[43]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA2_Stream0_IRQHandler
    933. 

  933. </UL>
    934. 

  934. 

  935. <P><STRONG><a name="[ab]"></a>DMA_GetITStatus</STRONG> (Thumb, 68 bytes, Stack size 12 bytes, stm32f4xx_dma.o(i.DMA_GetITStatus))
    936. 

  936. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = DMA_GetITStatus
    937. 

  937. </UL>
    938. 

  938. <BR>[Called By]<UL><LI><a href="#[43]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA2_Stream0_IRQHandler
    939. 

  939. <LI><a href="#[1b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA1_Stream5_IRQHandler
    940. 

  940. <LI><a href="#[19]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA1_Stream3_IRQHandler
    941. 

  941. <LI><a href="#[16]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA1_Stream0_IRQHandler
    942. 

  942. </UL>
    943. 

  943. 

  944. <P><STRONG><a name="[84]"></a>DMA_ITConfig</STRONG> (Thumb, 44 bytes, Stack size 0 bytes, stm32f4xx_dma.o(i.DMA_ITConfig))
    945. 

  945. <BR><BR>[Called By]<UL><LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DSHOT_DMA_Config
    946. 

  946. <LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_DMA_Config
    947. 

  947. </UL>
    948. 

  948. 

  949. <P><STRONG><a name="[80]"></a>DMA_Init</STRONG> (Thumb, 80 bytes, Stack size 12 bytes, stm32f4xx_dma.o(i.DMA_Init))
    950. 

  950. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = DMA_Init
    951. 

  951. </UL>
    952. 

  952. <BR>[Called By]<UL><LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DSHOT_DMA_Config
    953. 

  953. <LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_DMA_Config
    954. 

  954. </UL>
    955. 

  955. 

  956. <P><STRONG><a name="[af]"></a>DSHOT_DMA_Config</STRONG> (Thumb, 140 bytes, Stack size 88 bytes, dshot.o(i.DSHOT_DMA_Config))
    957. 

  957. <BR><BR>[Stack]<UL><LI>Max Depth = 116<LI>Call Chain = DSHOT_DMA_Config &rArr; DMA_DeInit
    958. 

  958. </UL>
    959. 

  959. <BR>[Calls]<UL><LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_DMACmd
    960. 

  960. <LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_AHB1PeriphClockCmd
    961. 

  961. <LI><a href="#[80]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_Init
    962. 

  962. <LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_ITConfig
    963. 

  963. <LI><a href="#[b1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_GetCmdStatus
    964. 

  964. <LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_DeInit
    965. 

  965. <LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_Cmd
    966. 

  966. <LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_ClearITPendingBit
    967. 

  967. </UL>
    968. 

  968. <BR>[Called By]<UL><LI><a href="#[24]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM1_UP_TIM10_IRQHandler
    969. 

  969. </UL>
    970. 

  970. 

  971. <P><STRONG><a name="[b3]"></a>Dshot_Config</STRONG> (Thumb, 240 bytes, Stack size 48 bytes, main.o(i.Dshot_Config))
    972. 

  972. <BR><BR>[Stack]<UL><LI>Max Depth = 116<LI>Call Chain = Dshot_Config &rArr; Dshot_TIM_Config &rArr; TIM_TimeBaseInit
    973. 

  973. </UL>
    974. 

  974. <BR>[Calls]<UL><LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_NVIC_Config
    975. 

  975. <LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_Mod_Config
    976. 

  976. <LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Dshot_TIM_Config
    977. 

  977. <LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Dshot_NVIC_Config
    978. 

  978. <LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Dshot_GPIO_Config
    979. 

  979. </UL>
    980. 

  980. <BR>[Called By]<UL><LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    981. 

  981. </UL>
    982. 

  982. 

  983. <P><STRONG><a name="[b4]"></a>Dshot_GPIO_Config</STRONG> (Thumb, 66 bytes, Stack size 32 bytes, dshot.o(i.Dshot_GPIO_Config))
    984. 

  984. <BR><BR>[Stack]<UL><LI>Max Depth = 52<LI>Call Chain = Dshot_GPIO_Config &rArr; GPIO_Init
    985. 

  985. </UL>
    986. 

  986. <BR>[Calls]<UL><LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_AHB1PeriphClockCmd
    987. 

  987. <LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_PinAFConfig
    988. 

  988. <LI><a href="#[86]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_Init
    989. 

  989. </UL>
    990. 

  990. <BR>[Called By]<UL><LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Dshot_Config
    991. 

  991. </UL>
    992. 

  992. 

  993. <P><STRONG><a name="[b6]"></a>Dshot_NVIC_Config</STRONG> (Thumb, 28 bytes, Stack size 8 bytes, dshot.o(i.Dshot_NVIC_Config))
    994. 

  994. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = Dshot_NVIC_Config &rArr; NVIC_Init
    995. 

  995. </UL>
    996. 

  996. <BR>[Calls]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NVIC_Init
    997. 

  997. </UL>
    998. 

  998. <BR>[Called By]<UL><LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Dshot_Config
    999. 

  999. </UL>
    1000. 

  1000. 

  1001. <P><STRONG><a name="[b5]"></a>Dshot_TIM_Config</STRONG> (Thumb, 106 bytes, Stack size 56 bytes, dshot.o(i.Dshot_TIM_Config))
    1002. 

  1002. <BR><BR>[Stack]<UL><LI>Max Depth = 68<LI>Call Chain = Dshot_TIM_Config &rArr; TIM_TimeBaseInit
    1003. 

  1003. </UL>
    1004. 

  1004. <BR>[Calls]<UL><LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_TimeBaseInit
    1005. 

  1005. <LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_Cmd
    1006. 

  1006. <LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_ARRPreloadConfig
    1007. 

  1007. </UL>
    1008. 

  1008. <BR>[Called By]<UL><LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Dshot_Config
    1009. 

  1009. </UL>
    1010. 

  1010. 

  1011. <P><STRONG><a name="[97]"></a>Equation</STRONG> (Thumb, 60 bytes, Stack size 0 bytes, main.o(i.Equation))
    1012. 

  1012. <BR><BR>[Called By]<UL><LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AnaMotorData
    1013. 

  1013. </UL>
    1014. 

  1014. 

  1015. <P><STRONG><a name="[d4]"></a>FLASH_DataCacheCmd</STRONG> (Thumb, 22 bytes, Stack size 0 bytes, stm32f4xx_flash.o(i.FLASH_DataCacheCmd))
    1016. 

  1016. <BR><BR>[Called By]<UL><LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;STMFLASH_Write
    1017. 

  1017. </UL>
    1018. 

  1018. 

  1019. <P><STRONG><a name="[ba]"></a>FLASH_EraseSector</STRONG> (Thumb, 104 bytes, Stack size 16 bytes, stm32f4xx_flash.o(i.FLASH_EraseSector))
    1020. 

  1020. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = FLASH_EraseSector &rArr; FLASH_WaitForLastOperation
    1021. 

  1021. </UL>
    1022. 

  1022. <BR>[Calls]<UL><LI><a href="#[bb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_WaitForLastOperation
    1023. 

  1023. </UL>
    1024. 

  1024. <BR>[Called By]<UL><LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;STMFLASH_Write
    1025. 

  1025. </UL>
    1026. 

  1026. 

  1027. <P><STRONG><a name="[bd]"></a>FLASH_GetStatus</STRONG> (Thumb, 56 bytes, Stack size 0 bytes, stm32f4xx_flash.o(i.FLASH_GetStatus))
    1028. 

  1028. <BR><BR>[Called By]<UL><LI><a href="#[bb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_WaitForLastOperation
    1029. 

  1029. </UL>
    1030. 

  1030. 

  1031. <P><STRONG><a name="[d6]"></a>FLASH_Lock</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, stm32f4xx_flash.o(i.FLASH_Lock))
    1032. 

  1032. <BR><BR>[Called By]<UL><LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;STMFLASH_Write
    1033. 

  1033. </UL>
    1034. 

  1034. 

  1035. <P><STRONG><a name="[bc]"></a>FLASH_ProgramWord</STRONG> (Thumb, 56 bytes, Stack size 16 bytes, stm32f4xx_flash.o(i.FLASH_ProgramWord))
    1036. 

  1036. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = FLASH_ProgramWord &rArr; FLASH_WaitForLastOperation
    1037. 

  1037. </UL>
    1038. 

  1038. <BR>[Calls]<UL><LI><a href="#[bb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_WaitForLastOperation
    1039. 

  1039. </UL>
    1040. 

  1040. <BR>[Called By]<UL><LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;STMFLASH_Write
    1041. 

  1041. </UL>
    1042. 

  1042. 

  1043. <P><STRONG><a name="[d3]"></a>FLASH_Unlock</STRONG> (Thumb, 22 bytes, Stack size 0 bytes, stm32f4xx_flash.o(i.FLASH_Unlock))
    1044. 

  1044. <BR><BR>[Called By]<UL><LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;STMFLASH_Write
    1045. 

  1045. </UL>
    1046. 

  1046. 

  1047. <P><STRONG><a name="[bb]"></a>FLASH_WaitForLastOperation</STRONG> (Thumb, 30 bytes, Stack size 8 bytes, stm32f4xx_flash.o(i.FLASH_WaitForLastOperation))
    1048. 

  1048. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = FLASH_WaitForLastOperation
    1049. 

  1049. </UL>
    1050. 

  1050. <BR>[Calls]<UL><LI><a href="#[bd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_GetStatus
    1051. 

  1051. </UL>
    1052. 

  1052. <BR>[Called By]<UL><LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_ProgramWord
    1053. 

  1053. <LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_EraseSector
    1054. 

  1054. </UL>
    1055. 

  1055. 

  1056. <P><STRONG><a name="[be]"></a>Flash_ReadInf</STRONG> (Thumb, 142 bytes, Stack size 8 bytes, main.o(i.Flash_ReadInf))
    1057. 

  1057. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = Flash_ReadInf &rArr; Flash_WriteInf &rArr; STMFLASH_Write &rArr; FLASH_ProgramWord &rArr; FLASH_WaitForLastOperation
    1058. 

  1058. </UL>
    1059. 

  1059. <BR>[Calls]<UL><LI><a href="#[bf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;STMFLASH_ReadWord
    1060. 

  1060. <LI><a href="#[c1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ReadFloatWord
    1061. 

  1061. <LI><a href="#[c0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Flash_WriteInf
    1062. 

  1062. </UL>
    1063. 

  1063. <BR>[Called By]<UL><LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1064. 

  1064. </UL>
    1065. 

  1065. 

  1066. <P><STRONG><a name="[c0]"></a>Flash_WriteInf</STRONG> (Thumb, 170 bytes, Stack size 8 bytes, main.o(i.Flash_WriteInf))
    1067. 

  1067. <BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = Flash_WriteInf &rArr; STMFLASH_Write &rArr; FLASH_ProgramWord &rArr; FLASH_WaitForLastOperation
    1068. 

  1068. </UL>
    1069. 

  1069. <BR>[Calls]<UL><LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;STMFLASH_Write
    1070. 

  1070. <LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IWDG_Feed
    1071. 

  1071. </UL>
    1072. 

  1072. <BR>[Called By]<UL><LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_Updata_requre
    1073. 

  1073. <LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Flash_ReadInf
    1074. 

  1074. </UL>
    1075. 

  1075. 

  1076. <P><STRONG><a name="[c3]"></a>GPIO_Config</STRONG> (Thumb, 46 bytes, Stack size 24 bytes, led.o(i.GPIO_Config))
    1077. 

  1077. <BR><BR>[Stack]<UL><LI>Max Depth = 44<LI>Call Chain = GPIO_Config &rArr; GPIO_Init
    1078. 

  1078. </UL>
    1079. 

  1079. <BR>[Calls]<UL><LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_AHB1PeriphClockCmd
    1080. 

  1080. <LI><a href="#[86]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_Init
    1081. 

  1081. </UL>
    1082. 

  1082. <BR>[Called By]<UL><LI><a href="#[f8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USBL_Config
    1083. 

  1083. <LI><a href="#[cd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Light_Config
    1084. 

  1084. <LI><a href="#[cc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LED_Config
    1085. 

  1085. </UL>
    1086. 

  1086. 

  1087. <P><STRONG><a name="[86]"></a>GPIO_Init</STRONG> (Thumb, 120 bytes, Stack size 20 bytes, stm32f4xx_gpio.o(i.GPIO_Init))
    1088. 

  1088. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = GPIO_Init
    1089. 

  1089. </UL>
    1090. 

  1090. <BR>[Called By]<UL><LI><a href="#[f1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_GPIO_Config
    1091. 

  1091. <LI><a href="#[c3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_Config
    1092. 

  1092. <LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Dshot_GPIO_Config
    1093. 

  1093. <LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_GPIO_Config
    1094. 

  1094. <LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_GPIO_Config
    1095. 

  1095. </UL>
    1096. 

  1096. 

  1097. <P><STRONG><a name="[a7]"></a>GPIO_PinAFConfig</STRONG> (Thumb, 32 bytes, Stack size 8 bytes, stm32f4xx_gpio.o(i.GPIO_PinAFConfig))
    1098. 

  1098. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = GPIO_PinAFConfig
    1099. 

  1099. </UL>
    1100. 

  1100. <BR>[Called By]<UL><LI><a href="#[f1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_GPIO_Config
    1101. 

  1101. <LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Dshot_GPIO_Config
    1102. 

  1102. <LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_GPIO_Config
    1103. 

  1103. </UL>
    1104. 

  1104. 

  1105. <P><STRONG><a name="[e7]"></a>GPIO_ResetBits</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f4xx_gpio.o(i.GPIO_ResetBits))
    1106. 

  1106. <BR><BR>[Called By]<UL><LI><a href="#[e5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_500ms_Task
    1107. 

  1107. </UL>
    1108. 

  1108. 

  1109. <P><STRONG><a name="[e8]"></a>GPIO_SetBits</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f4xx_gpio.o(i.GPIO_SetBits))
    1110. 

  1110. <BR><BR>[Called By]<UL><LI><a href="#[e5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_500ms_Task
    1111. 

  1111. </UL>
    1112. 

  1112. 

  1113. <P><STRONG><a name="[e6]"></a>GPIO_ToggleBits</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, stm32f4xx_gpio.o(i.GPIO_ToggleBits))
    1114. 

  1114. <BR><BR>[Called By]<UL><LI><a href="#[e5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_500ms_Task
    1115. 

  1115. </UL>
    1116. 

  1116. 

  1117. <P><STRONG><a name="[9d]"></a>GetDShotValue</STRONG> (Thumb, 98 bytes, Stack size 16 bytes, main.o(i.GetDShotValue))
    1118. 

  1118. <BR><BR>[Stack]<UL><LI>Max Depth = 104<LI>Call Chain = GetDShotValue &rArr; __aeabi_dmul &rArr; _double_epilogue &rArr; _double_round
    1119. 

  1119. </UL>
    1120. 

  1120. <BR>[Calls]<UL><LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_i2d
    1121. 

  1121. <LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dmul
    1122. 

  1122. <LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_d2iz
    1123. 

  1123. </UL>
    1124. 

  1124. <BR>[Called By]<UL><LI><a href="#[1f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_RX0_IRQHandler
    1125. 

  1125. </UL>
    1126. 

  1126. 

  1127. <P><STRONG><a name="[c4]"></a>GetMotorData</STRONG> (Thumb, 34 bytes, Stack size 8 bytes, main.o(i.GetMotorData))
    1128. 

  1128. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = GetMotorData
    1129. 

  1129. </UL>
    1130. 

  1130. <BR>[Calls]<UL><LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_ReceiveData
    1131. 

  1131. </UL>
    1132. 

  1132. <BR>[Called By]<UL><LI><a href="#[52]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART6_IRQHandler
    1133. 

  1133. <LI><a href="#[32]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART3_IRQHandler
    1134. 

  1134. <LI><a href="#[31]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART2_IRQHandler
    1135. 

  1135. <LI><a href="#[40]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART5_IRQHandler
    1136. 

  1136. </UL>
    1137. 

  1137. 

  1138. <P><STRONG><a name="[ae]"></a>Get_Temperature</STRONG> (Thumb, 188 bytes, Stack size 32 bytes, ntc.o(i.Get_Temperature))
    1139. 

  1139. <BR><BR>[Stack]<UL><LI>Max Depth = 232<LI>Call Chain = Get_Temperature &rArr; __hardfp_log &rArr; __kernel_poly &rArr; __aeabi_dmul &rArr; _double_epilogue &rArr; _double_round
    1140. 

  1140. </UL>
    1141. 

  1141. <BR>[Calls]<UL><LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_ui2d
    1142. 

  1142. <LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_f2d
    1143. 

  1143. <LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dsub
    1144. 

  1144. <LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dmul
    1145. 

  1145. <LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
    1146. 

  1146. <LI><a href="#[6e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_drsub
    1147. 

  1147. <LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_ddiv
    1148. 

  1148. <LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_d2f
    1149. 

  1149. <LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__hardfp_log
    1150. 

  1150. </UL>
    1151. 

  1151. <BR>[Called By]<UL><LI><a href="#[43]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA2_Stream0_IRQHandler
    1152. 

  1152. </UL>
    1153. 

  1153. 

  1154. <P><STRONG><a name="[3]"></a>HardFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, it.o(i.HardFault_Handler))
    1155. 

  1155. <BR><BR>[Calls]<UL><LI><a href="#[3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HardFault_Handler
    1156. 

  1156. </UL>
    1157. 

  1157. <BR>[Called By]<UL><LI><a href="#[3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HardFault_Handler
    1158. 

  1158. </UL>
    1159. 

  1159. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    1160. 

  1160. </UL>
    1161. 

  1161. <P><STRONG><a name="[c7]"></a>IWDG_Config</STRONG> (Thumb, 38 bytes, Stack size 16 bytes, iwag.o(i.IWDG_Config))
    1162. 

  1162. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = IWDG_Config
    1163. 

  1163. </UL>
    1164. 

  1164. <BR>[Calls]<UL><LI><a href="#[c8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IWDG_WriteAccessCmd
    1165. 

  1165. <LI><a href="#[ca]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IWDG_SetReload
    1166. 

  1166. <LI><a href="#[c9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IWDG_SetPrescaler
    1167. 

  1167. <LI><a href="#[cb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IWDG_ReloadCounter
    1168. 

  1168. </UL>
    1169. 

  1169. <BR>[Called By]<UL><LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1170. 

  1170. </UL>
    1171. 

  1171. 

  1172. <P><STRONG><a name="[111]"></a>IWDG_Enable</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, stm32f4xx_iwdg.o(i.IWDG_Enable), UNUSED)
    1173. 

  1173. 

  1174. <P><STRONG><a name="[9b]"></a>IWDG_Feed</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, iwag.o(i.IWDG_Feed))
    1175. 

  1175. <BR><BR>[Called By]<UL><LI><a href="#[c0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Flash_WriteInf
    1176. 

  1176. <LI><a href="#[1f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_RX0_IRQHandler
    1177. 

  1177. </UL>
    1178. 

  1178. 

  1179. <P><STRONG><a name="[cb]"></a>IWDG_ReloadCounter</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, stm32f4xx_iwdg.o(i.IWDG_ReloadCounter))
    1180. 

  1180. <BR><BR>[Called By]<UL><LI><a href="#[c7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IWDG_Config
    1181. 

  1181. </UL>
    1182. 

  1182. 

  1183. <P><STRONG><a name="[c9]"></a>IWDG_SetPrescaler</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32f4xx_iwdg.o(i.IWDG_SetPrescaler))
    1184. 

  1184. <BR><BR>[Called By]<UL><LI><a href="#[c7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IWDG_Config
    1185. 

  1185. </UL>
    1186. 

  1186. 

  1187. <P><STRONG><a name="[ca]"></a>IWDG_SetReload</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32f4xx_iwdg.o(i.IWDG_SetReload))
    1188. 

  1188. <BR><BR>[Called By]<UL><LI><a href="#[c7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IWDG_Config
    1189. 

  1189. </UL>
    1190. 

  1190. 

  1191. <P><STRONG><a name="[c8]"></a>IWDG_WriteAccessCmd</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32f4xx_iwdg.o(i.IWDG_WriteAccessCmd))
    1192. 

  1192. <BR><BR>[Called By]<UL><LI><a href="#[c7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IWDG_Config
    1193. 

  1193. </UL>
    1194. 

  1194. 

  1195. <P><STRONG><a name="[cc]"></a>LED_Config</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, main.o(i.LED_Config))
    1196. 

  1196. <BR><BR>[Stack]<UL><LI>Max Depth = 44<LI>Call Chain = LED_Config &rArr; GPIO_Config &rArr; GPIO_Init
    1197. 

  1197. </UL>
    1198. 

  1198. <BR>[Calls]<UL><LI><a href="#[c3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_Config
    1199. 

  1199. </UL>
    1200. 

  1200. <BR>[Called By]<UL><LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1201. 

  1201. </UL>
    1202. 

  1202. 

  1203. <P><STRONG><a name="[cd]"></a>Light_Config</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, main.o(i.Light_Config))
    1204. 

  1204. <BR><BR>[Stack]<UL><LI>Max Depth = 44<LI>Call Chain = Light_Config &rArr; GPIO_Config &rArr; GPIO_Init
    1205. 

  1205. </UL>
    1206. 

  1206. <BR>[Calls]<UL><LI><a href="#[c3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_Config
    1207. 

  1207. </UL>
    1208. 

  1208. <BR>[Called By]<UL><LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1209. 

  1209. </UL>
    1210. 

  1210. 

  1211. <P><STRONG><a name="[101]"></a>Micros</STRONG> (Thumb, 50 bytes, Stack size 8 bytes, delay.o(i.Micros))
    1212. 

  1212. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = Micros
    1213. 

  1213. </UL>
    1214. 

  1214. <BR>[Called By]<UL><LI><a href="#[100]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;delay_ms
    1215. 

  1215. </UL>
    1216. 

  1216. 

  1217. <P><STRONG><a name="[ce]"></a>Motor_AD_correct</STRONG> (Thumb, 182 bytes, Stack size 24 bytes, main.o(i.Motor_AD_correct))
    1218. 

  1218. <BR><BR>[Stack]<UL><LI>Max Depth = 112<LI>Call Chain = Motor_AD_correct &rArr; __aeabi_dmul &rArr; _double_epilogue &rArr; _double_round
    1219. 

  1219. </UL>
    1220. 

  1220. <BR>[Calls]<UL><LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dmul
    1221. 

  1221. <LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
    1222. 

  1222. </UL>
    1223. 

  1223. <BR>[Called By]<UL><LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1224. 

  1224. </UL>
    1225. 

  1225. 

  1226. <P><STRONG><a name="[e4]"></a>Motor_Control</STRONG> (Thumb, 300 bytes, Stack size 16 bytes, main.o(i.Motor_Control))
    1227. 

  1227. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = Motor_Control
    1228. 

  1228. </UL>
    1229. 

  1229. <BR>[Called By]<UL><LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_20ms_Task
    1230. 

  1230. </UL>
    1231. 

  1231. 

  1232. <P><STRONG><a name="[cf]"></a>Motor_Stall_check</STRONG> (Thumb, 34 bytes, Stack size 8 bytes, main.o(i.Motor_Stall_check))
    1233. 

  1233. <BR><BR>[Stack]<UL><LI>Max Depth = 136<LI>Call Chain = Motor_Stall_check &rArr; Stall_check &rArr; __aeabi_dsub &rArr; __aeabi_dadd &rArr; _double_epilogue &rArr; _double_round
    1234. 

  1234. </UL>
    1235. 

  1235. <BR>[Calls]<UL><LI><a href="#[d0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Stall_check
    1236. 

  1236. </UL>
    1237. 

  1237. <BR>[Called By]<UL><LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1238. 

  1238. </UL>
    1239. 

  1239. 

  1240. <P><STRONG><a name="[8e]"></a>NVIC_Init</STRONG> (Thumb, 96 bytes, Stack size 12 bytes, misc.o(i.NVIC_Init))
    1241. 

  1241. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = NVIC_Init
    1242. 

  1242. </UL>
    1243. 

  1243. <BR>[Called By]<UL><LI><a href="#[f2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_NVIC_Config
    1244. 

  1244. <LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_NVIC_Config
    1245. 

  1245. <LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Dshot_NVIC_Config
    1246. 

  1246. <LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_NVIC_Config
    1247. 

  1247. <LI><a href="#[7c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_NVIC_Config
    1248. 

  1248. </UL>
    1249. 

  1249. 

  1250. <P><STRONG><a name="[103]"></a>NVIC_PriorityGroupConfig</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, misc.o(i.NVIC_PriorityGroupConfig))
    1251. 

  1251. <BR><BR>[Called By]<UL><LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1252. 

  1252. </UL>
    1253. 

  1253. 

  1254. <P><STRONG><a name="[d1]"></a>Other_Task</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, main.o(i.Other_Task))
    1255. 

  1255. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = Other_Task &rArr; Send_Updata_requre &rArr; Flash_WriteInf &rArr; STMFLASH_Write &rArr; FLASH_ProgramWord &rArr; FLASH_WaitForLastOperation
    1256. 

  1256. </UL>
    1257. 

  1257. <BR>[Calls]<UL><LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_Updata_requre
    1258. 

  1258. </UL>
    1259. 

  1259. <BR>[Called By]<UL><LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1260. 

  1260. </UL>
    1261. 

  1261. 

  1262. <P><STRONG><a name="[7f]"></a>RCC_AHB1PeriphClockCmd</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, stm32f4xx_rcc.o(i.RCC_AHB1PeriphClockCmd))
    1263. 

  1263. <BR><BR>[Called By]<UL><LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DSHOT_DMA_Config
    1264. 

  1264. <LI><a href="#[f1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_GPIO_Config
    1265. 

  1265. <LI><a href="#[c3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_Config
    1266. 

  1266. <LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Dshot_GPIO_Config
    1267. 

  1267. <LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_GPIO_Config
    1268. 

  1268. <LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_GPIO_Config
    1269. 

  1269. <LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_DMA_Config
    1270. 

  1270. </UL>
    1271. 

  1271. 

  1272. <P><STRONG><a name="[62]"></a>RCC_APB1PeriphClockCmd</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, stm32f4xx_rcc.o(i.RCC_APB1PeriphClockCmd))
    1273. 

  1273. <BR><BR>[Called By]<UL><LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_Mod_Config
    1274. 

  1274. </UL>
    1275. 

  1275. <BR>[Address Reference Count : 3]<UL><LI> main.o(i.ADC_Config)
    1276. 

  1276. <LI> main.o(i.Dshot_Config)
    1277. 

  1277. <LI> main.o(i.USART_Config)
    1278. 

  1278. </UL>
    1279. 

  1279. <P><STRONG><a name="[65]"></a>RCC_APB2PeriphClockCmd</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, stm32f4xx_rcc.o(i.RCC_APB2PeriphClockCmd))
    1280. 

  1280. <BR><BR>[Called By]<UL><LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_Mode_Config
    1281. 

  1281. </UL>
    1282. 

  1282. <BR>[Address Reference Count : 2]<UL><LI> main.o(i.Dshot_Config)
    1283. 

  1283. <LI> main.o(i.USART_Config)
    1284. 

  1284. </UL>
    1285. 

  1285. <P><STRONG><a name="[87]"></a>RCC_APB2PeriphResetCmd</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, stm32f4xx_rcc.o(i.RCC_APB2PeriphResetCmd))
    1286. 

  1286. <BR><BR>[Called By]<UL><LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_Mode_Config
    1287. 

  1287. </UL>
    1288. 

  1288. 

  1289. <P><STRONG><a name="[f5]"></a>RCC_GetClocksFreq</STRONG> (Thumb, 132 bytes, Stack size 16 bytes, stm32f4xx_rcc.o(i.RCC_GetClocksFreq))
    1290. 

  1290. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = RCC_GetClocksFreq
    1291. 

  1291. </UL>
    1292. 

  1292. <BR>[Called By]<UL><LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_Init
    1293. 

  1293. <LI><a href="#[ff]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;cycleCounterInit
    1294. 

  1294. </UL>
    1295. 

  1295. 

  1296. <P><STRONG><a name="[c1]"></a>ReadFloatWord</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, flash.o(i.ReadFloatWord))
    1297. 

  1297. <BR><BR>[Called By]<UL><LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Flash_ReadInf
    1298. 

  1298. </UL>
    1299. 

  1299. 

  1300. <P><STRONG><a name="[99]"></a>Rec_Flash_Set</STRONG> (Thumb, 196 bytes, Stack size 32 bytes, can.o(i.Rec_Flash_Set))
    1301. 

  1301. <BR><BR>[Stack]<UL><LI>Max Depth = 120<LI>Call Chain = Rec_Flash_Set &rArr; __aeabi_dmul &rArr; _double_epilogue &rArr; _double_round
    1302. 

  1302. </UL>
    1303. 

  1303. <BR>[Calls]<UL><LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_ui2d
    1304. 

  1304. <LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_i2d
    1305. 

  1305. <LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dmul
    1306. 

  1306. <LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
    1307. 

  1307. <LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_d2f
    1308. 

  1308. </UL>
    1309. 

  1309. <BR>[Called By]<UL><LI><a href="#[1f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_RX0_IRQHandler
    1310. 

  1310. </UL>
    1311. 

  1311. 

  1312. <P><STRONG><a name="[9c]"></a>ResearchProtection</STRONG> (Thumb, 22 bytes, Stack size 0 bytes, it.o(i.ResearchProtection))
    1313. 

  1313. <BR><BR>[Called By]<UL><LI><a href="#[1f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_RX0_IRQHandler
    1314. 

  1314. </UL>
    1315. 

  1315. 

  1316. <P><STRONG><a name="[d5]"></a>STMFLASH_GetFlashSector</STRONG> (Thumb, 114 bytes, Stack size 0 bytes, flash.o(i.STMFLASH_GetFlashSector))
    1317. 

  1317. <BR><BR>[Called By]<UL><LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;STMFLASH_Write
    1318. 

  1318. </UL>
    1319. 

  1319. 

  1320. <P><STRONG><a name="[bf]"></a>STMFLASH_ReadWord</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, flash.o(i.STMFLASH_ReadWord))
    1321. 

  1321. <BR><BR>[Called By]<UL><LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Flash_ReadInf
    1322. 

  1322. </UL>
    1323. 

  1323. 

  1324. <P><STRONG><a name="[c2]"></a>STMFLASH_Write</STRONG> (Thumb, 122 bytes, Stack size 24 bytes, flash.o(i.STMFLASH_Write))
    1325. 

  1325. <BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = STMFLASH_Write &rArr; FLASH_ProgramWord &rArr; FLASH_WaitForLastOperation
    1326. 

  1326. </UL>
    1327. 

  1327. <BR>[Calls]<UL><LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_Unlock
    1328. 

  1328. <LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_ProgramWord
    1329. 

  1329. <LI><a href="#[d6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_Lock
    1330. 

  1330. <LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_EraseSector
    1331. 

  1331. <LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_DataCacheCmd
    1332. 

  1332. <LI><a href="#[d5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;STMFLASH_GetFlashSector
    1333. 

  1333. </UL>
    1334. 

  1334. <BR>[Called By]<UL><LI><a href="#[c0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Flash_WriteInf
    1335. 

  1335. </UL>
    1336. 

  1336. 

  1337. <P><STRONG><a name="[d7]"></a>Send_CAN_DATA1</STRONG> (Thumb, 96 bytes, Stack size 8 bytes, can.o(i.Send_CAN_DATA1))
    1338. 

  1338. <BR><BR>[Stack]<UL><LI>Max Depth = 60<LI>Call Chain = Send_CAN_DATA1 &rArr; CAN1_Send_Msg &rArr; CAN_Transmit
    1339. 

  1339. </UL>
    1340. 

  1340. <BR>[Calls]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_Send_Msg
    1341. 

  1341. </UL>
    1342. 

  1342. <BR>[Called By]<UL><LI><a href="#[e1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_100ms_Task
    1343. 

  1343. </UL>
    1344. 

  1344. 

  1345. <P><STRONG><a name="[d8]"></a>Send_CAN_DATA2</STRONG> (Thumb, 58 bytes, Stack size 8 bytes, can.o(i.Send_CAN_DATA2))
    1346. 

  1346. <BR><BR>[Stack]<UL><LI>Max Depth = 60<LI>Call Chain = Send_CAN_DATA2 &rArr; CAN1_Send_Msg &rArr; CAN_Transmit
    1347. 

  1347. </UL>
    1348. 

  1348. <BR>[Calls]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_Send_Msg
    1349. 

  1349. </UL>
    1350. 

  1350. <BR>[Called By]<UL><LI><a href="#[e1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_100ms_Task
    1351. 

  1351. </UL>
    1352. 

  1352. 

  1353. <P><STRONG><a name="[d9]"></a>Send_CAN_DATA3</STRONG> (Thumb, 78 bytes, Stack size 8 bytes, can.o(i.Send_CAN_DATA3))
    1354. 

  1354. <BR><BR>[Stack]<UL><LI>Max Depth = 60<LI>Call Chain = Send_CAN_DATA3 &rArr; CAN1_Send_Msg &rArr; CAN_Transmit
    1355. 

  1355. </UL>
    1356. 

  1356. <BR>[Calls]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_Send_Msg
    1357. 

  1357. </UL>
    1358. 

  1358. <BR>[Called By]<UL><LI><a href="#[e1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_100ms_Task
    1359. 

  1359. </UL>
    1360. 

  1360. 

  1361. <P><STRONG><a name="[da]"></a>Send_CAN_DATA4</STRONG> (Thumb, 78 bytes, Stack size 8 bytes, can.o(i.Send_CAN_DATA4))
    1362. 

  1362. <BR><BR>[Stack]<UL><LI>Max Depth = 60<LI>Call Chain = Send_CAN_DATA4 &rArr; CAN1_Send_Msg &rArr; CAN_Transmit
    1363. 

  1363. </UL>
    1364. 

  1364. <BR>[Calls]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_Send_Msg
    1365. 

  1365. </UL>
    1366. 

  1366. <BR>[Called By]<UL><LI><a href="#[e1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_100ms_Task
    1367. 

  1367. </UL>
    1368. 

  1368. 

  1369. <P><STRONG><a name="[db]"></a>Send_CAN_DATA5</STRONG> (Thumb, 112 bytes, Stack size 0 bytes, can.o(i.Send_CAN_DATA5))
    1370. 

  1370. <BR><BR>[Stack]<UL><LI>Max Depth = 52<LI>Call Chain = Send_CAN_DATA5 &rArr; CAN1_Send_Msg &rArr; CAN_Transmit
    1371. 

  1371. </UL>
    1372. 

  1372. <BR>[Calls]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_Send_Msg
    1373. 

  1373. </UL>
    1374. 

  1374. <BR>[Called By]<UL><LI><a href="#[e1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_100ms_Task
    1375. 

  1375. </UL>
    1376. 

  1376. 

  1377. <P><STRONG><a name="[dc]"></a>Send_CAN_DATA6</STRONG> (Thumb, 68 bytes, Stack size 8 bytes, can.o(i.Send_CAN_DATA6))
    1378. 

  1378. <BR><BR>[Stack]<UL><LI>Max Depth = 60<LI>Call Chain = Send_CAN_DATA6 &rArr; CAN1_Send_Msg &rArr; CAN_Transmit
    1379. 

  1379. </UL>
    1380. 

  1380. <BR>[Calls]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_Send_Msg
    1381. 

  1381. </UL>
    1382. 

  1382. <BR>[Called By]<UL><LI><a href="#[e1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_100ms_Task
    1383. 

  1383. </UL>
    1384. 

  1384. 

  1385. <P><STRONG><a name="[dd]"></a>Send_Flash_Set</STRONG> (Thumb, 126 bytes, Stack size 0 bytes, can.o(i.Send_Flash_Set))
    1386. 

  1386. <BR><BR>[Stack]<UL><LI>Max Depth = 52<LI>Call Chain = Send_Flash_Set &rArr; CAN1_Send_Msg &rArr; CAN_Transmit
    1387. 

  1387. </UL>
    1388. 

  1388. <BR>[Calls]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_Send_Msg
    1389. 

  1389. </UL>
    1390. 

  1390. <BR>[Called By]<UL><LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_Updata_requre
    1391. 

  1391. <LI><a href="#[de]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_Pixhawk_requre
    1392. 

  1392. </UL>
    1393. 

  1393. 

  1394. <P><STRONG><a name="[de]"></a>Send_Pixhawk_requre</STRONG> (Thumb, 154 bytes, Stack size 8 bytes, main.o(i.Send_Pixhawk_requre))
    1395. 

  1395. <BR><BR>[Stack]<UL><LI>Max Depth = 60<LI>Call Chain = Send_Pixhawk_requre &rArr; Send_Flash_Set &rArr; CAN1_Send_Msg &rArr; CAN_Transmit
    1396. 

  1396. </UL>
    1397. 

  1397. <BR>[Calls]<UL><LI><a href="#[dd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_Flash_Set
    1398. 

  1398. </UL>
    1399. 

  1399. <BR>[Called By]<UL><LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_10ms_Task
    1400. 

  1400. </UL>
    1401. 

  1401. 

  1402. <P><STRONG><a name="[d2]"></a>Send_Updata_requre</STRONG> (Thumb, 156 bytes, Stack size 8 bytes, main.o(i.Send_Updata_requre))
    1403. 

  1403. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = Send_Updata_requre &rArr; Flash_WriteInf &rArr; STMFLASH_Write &rArr; FLASH_ProgramWord &rArr; FLASH_WaitForLastOperation
    1404. 

  1404. </UL>
    1405. 

  1405. <BR>[Calls]<UL><LI><a href="#[dd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_Flash_Set
    1406. 

  1406. <LI><a href="#[c0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Flash_WriteInf
    1407. 

  1407. </UL>
    1408. 

  1408. <BR>[Called By]<UL><LI><a href="#[d1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Other_Task
    1409. 

  1409. </UL>
    1410. 

  1410. 

  1411. <P><STRONG><a name="[94]"></a>Single_Motor_Config</STRONG> (Thumb, 48 bytes, Stack size 0 bytes, main.o(i.Single_Motor_Config))
    1412. 

  1412. <BR><BR>[Called By]<UL><LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;All_motor_Config
    1413. 

  1413. </UL>
    1414. 

  1414. 

  1415. <P><STRONG><a name="[9a]"></a>SoftReset</STRONG> (Thumb, 32 bytes, Stack size 0 bytes, main.o(i.SoftReset))
    1416. 

  1416. <BR><BR>[Called By]<UL><LI><a href="#[1f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_RX0_IRQHandler
    1417. 

  1417. </UL>
    1418. 

  1418. 

  1419. <P><STRONG><a name="[d0]"></a>Stall_check</STRONG> (Thumb, 410 bytes, Stack size 40 bytes, main.o(i.Stall_check))
    1420. 

  1420. <BR><BR>[Stack]<UL><LI>Max Depth = 128<LI>Call Chain = Stall_check &rArr; __aeabi_dsub &rArr; __aeabi_dadd &rArr; _double_epilogue &rArr; _double_round
    1421. 

  1421. </UL>
    1422. 

  1422. <BR>[Calls]<UL><LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_f2d
    1423. 

  1423. <LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dsub
    1424. 

  1424. <LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dmul
    1425. 

  1425. <LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_cdrcmple
    1426. 

  1426. <LI><a href="#[e0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_cdcmple
    1427. 

  1427. </UL>
    1428. 

  1428. <BR>[Called By]<UL><LI><a href="#[cf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Motor_Stall_check
    1429. 

  1429. </UL>
    1430. 

  1430. 

  1431. <P><STRONG><a name="[e1]"></a>SysTick_100ms_Task</STRONG> (Thumb, 84 bytes, Stack size 8 bytes, main.o(i.SysTick_100ms_Task))
    1432. 

  1432. <BR><BR>[Stack]<UL><LI>Max Depth = 68<LI>Call Chain = SysTick_100ms_Task &rArr; Send_CAN_DATA6 &rArr; CAN1_Send_Msg &rArr; CAN_Transmit
    1433. 

  1433. </UL>
    1434. 

  1434. <BR>[Calls]<UL><LI><a href="#[dc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_CAN_DATA6
    1435. 

  1435. <LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_CAN_DATA5
    1436. 

  1436. <LI><a href="#[da]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_CAN_DATA4
    1437. 

  1437. <LI><a href="#[d9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_CAN_DATA3
    1438. 

  1438. <LI><a href="#[d8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_CAN_DATA2
    1439. 

  1439. <LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_CAN_DATA1
    1440. 

  1440. </UL>
    1441. 

  1441. <BR>[Called By]<UL><LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1442. 

  1442. </UL>
    1443. 

  1443. 

  1444. <P><STRONG><a name="[e2]"></a>SysTick_10ms_Task</STRONG> (Thumb, 24 bytes, Stack size 0 bytes, main.o(i.SysTick_10ms_Task))
    1445. 

  1445. <BR><BR>[Stack]<UL><LI>Max Depth = 60<LI>Call Chain = SysTick_10ms_Task &rArr; Send_Pixhawk_requre &rArr; Send_Flash_Set &rArr; CAN1_Send_Msg &rArr; CAN_Transmit
    1446. 

  1446. </UL>
    1447. 

  1447. <BR>[Calls]<UL><LI><a href="#[de]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_Pixhawk_requre
    1448. 

  1448. </UL>
    1449. 

  1449. <BR>[Called By]<UL><LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1450. 

  1450. </UL>
    1451. 

  1451. 

  1452. <P><STRONG><a name="[e3]"></a>SysTick_20ms_Task</STRONG> (Thumb, 50 bytes, Stack size 4 bytes, main.o(i.SysTick_20ms_Task))
    1453. 

  1453. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = SysTick_20ms_Task &rArr; Motor_Control
    1454. 

  1454. </UL>
    1455. 

  1455. <BR>[Calls]<UL><LI><a href="#[e4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Motor_Control
    1456. 

  1456. </UL>
    1457. 

  1457. <BR>[Called By]<UL><LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1458. 

  1458. </UL>
    1459. 

  1459. 

  1460. <P><STRONG><a name="[e5]"></a>SysTick_500ms_Task</STRONG> (Thumb, 84 bytes, Stack size 16 bytes, main.o(i.SysTick_500ms_Task))
    1461. 

  1461. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = SysTick_500ms_Task
    1462. 

  1462. </UL>
    1463. 

  1463. <BR>[Calls]<UL><LI><a href="#[e6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_ToggleBits
    1464. 

  1464. <LI><a href="#[e8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_SetBits
    1465. 

  1465. <LI><a href="#[e7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_ResetBits
    1466. 

  1466. </UL>
    1467. 

  1467. <BR>[Called By]<UL><LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1468. 

  1468. </UL>
    1469. 

  1469. 

  1470. <P><STRONG><a name="[a]"></a>SysTick_Handler</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, it.o(i.SysTick_Handler))
    1471. 

  1471. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    1472. 

  1472. </UL>
    1473. 

  1473. <P><STRONG><a name="[5e]"></a>SystemInit</STRONG> (Thumb, 74 bytes, Stack size 8 bytes, system_stm32f4xx.o(i.SystemInit))
    1474. 

  1474. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = SystemInit &rArr; SetSysClock
    1475. 

  1475. </UL>
    1476. 

  1476. <BR>[Calls]<UL><LI><a href="#[e9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SetSysClock
    1477. 

  1477. </UL>
    1478. 

  1478. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(.text)
    1479. 

  1479. </UL>
    1480. 

  1480. <P><STRONG><a name="[24]"></a>TIM1_UP_TIM10_IRQHandler</STRONG> (Thumb, 202 bytes, Stack size 32 bytes, it.o(i.TIM1_UP_TIM10_IRQHandler))
    1481. 

  1481. <BR><BR>[Stack]<UL><LI>Max Depth = 148<LI>Call Chain = TIM1_UP_TIM10_IRQHandler &rArr; DSHOT_DMA_Config &rArr; DMA_DeInit
    1482. 

  1482. </UL>
    1483. 

  1483. <BR>[Calls]<UL><LI><a href="#[ec]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pwmWriteDigital
    1484. 

  1484. <LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DSHOT_DMA_Config
    1485. 

  1485. <LI><a href="#[ea]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_GetITStatus
    1486. 

  1486. <LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_ClearITPendingBit
    1487. 

  1487. </UL>
    1488. 

  1488. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    1489. 

  1489. </UL>
    1490. 

  1490. <P><STRONG><a name="[b9]"></a>TIM_ARRPreloadConfig</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, stm32f4xx_tim.o(i.TIM_ARRPreloadConfig))
    1491. 

  1491. <BR><BR>[Called By]<UL><LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_Mod_Config
    1492. 

  1492. <LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Dshot_TIM_Config
    1493. 

  1493. </UL>
    1494. 

  1494. 

  1495. <P><STRONG><a name="[eb]"></a>TIM_ClearITPendingBit</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32f4xx_tim.o(i.TIM_ClearITPendingBit))
    1496. 

  1496. <BR><BR>[Called By]<UL><LI><a href="#[24]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM1_UP_TIM10_IRQHandler
    1497. 

  1497. </UL>
    1498. 

  1498. 

  1499. <P><STRONG><a name="[92]"></a>TIM_Cmd</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, stm32f4xx_tim.o(i.TIM_Cmd))
    1500. 

  1500. <BR><BR>[Called By]<UL><LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_Mod_Config
    1501. 

  1501. <LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Dshot_TIM_Config
    1502. 

  1502. <LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_TIM_Config
    1503. 

  1503. </UL>
    1504. 

  1504. 

  1505. <P><STRONG><a name="[90]"></a>TIM_CtrlPWMOutputs</STRONG> (Thumb, 22 bytes, Stack size 0 bytes, stm32f4xx_tim.o(i.TIM_CtrlPWMOutputs))
    1506. 

  1506. <BR><BR>[Called By]<UL><LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_TIM_Config
    1507. 

  1507. </UL>
    1508. 

  1508. 

  1509. <P><STRONG><a name="[b2]"></a>TIM_DMACmd</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, stm32f4xx_tim.o(i.TIM_DMACmd))
    1510. 

  1510. <BR><BR>[Called By]<UL><LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DSHOT_DMA_Config
    1511. 

  1511. </UL>
    1512. 

  1512. 

  1513. <P><STRONG><a name="[ea]"></a>TIM_GetITStatus</STRONG> (Thumb, 24 bytes, Stack size 0 bytes, stm32f4xx_tim.o(i.TIM_GetITStatus))
    1514. 

  1514. <BR><BR>[Called By]<UL><LI><a href="#[24]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM1_UP_TIM10_IRQHandler
    1515. 

  1515. </UL>
    1516. 

  1516. 

  1517. <P><STRONG><a name="[ed]"></a>TIM_ITConfig</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, stm32f4xx_tim.o(i.TIM_ITConfig))
    1518. 

  1518. <BR><BR>[Called By]<UL><LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_Mod_Config
    1519. 

  1519. </UL>
    1520. 

  1520. 

  1521. <P><STRONG><a name="[b7]"></a>TIM_Mod_Config</STRONG> (Thumb, 78 bytes, Stack size 32 bytes, time.o(i.TIM_Mod_Config))
    1522. 

  1522. <BR><BR>[Stack]<UL><LI>Max Depth = 44<LI>Call Chain = TIM_Mod_Config &rArr; TIM_TimeBaseInit
    1523. 

  1523. </UL>
    1524. 

  1524. <BR>[Calls]<UL><LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_TimeBaseInit
    1525. 

  1525. <LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_SelectOutputTrigger
    1526. 

  1526. <LI><a href="#[ed]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_ITConfig
    1527. 

  1527. <LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_Cmd
    1528. 

  1528. <LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_ARRPreloadConfig
    1529. 

  1529. </UL>
    1530. 

  1530. <BR>[Called By]<UL><LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Dshot_Config
    1531. 

  1531. </UL>
    1532. 

  1532. 

  1533. <P><STRONG><a name="[b8]"></a>TIM_NVIC_Config</STRONG> (Thumb, 28 bytes, Stack size 8 bytes, time.o(i.TIM_NVIC_Config))
    1534. 

  1534. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = TIM_NVIC_Config &rArr; NVIC_Init
    1535. 

  1535. </UL>
    1536. 

  1536. <BR>[Calls]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NVIC_Init
    1537. 

  1537. </UL>
    1538. 

  1538. <BR>[Called By]<UL><LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Dshot_Config
    1539. 

  1539. </UL>
    1540. 

  1540. 

  1541. <P><STRONG><a name="[61]"></a>TIM_OC1Init</STRONG> (Thumb, 88 bytes, Stack size 12 bytes, stm32f4xx_tim.o(i.TIM_OC1Init))
    1542. 

  1542. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = TIM_OC1Init
    1543. 

  1543. </UL>
    1544. 

  1544. <BR>[Address Reference Count : 2]<UL><LI> main.o(i.ADC_Config)
    1545. 

  1545. <LI> main.o(i.Dshot_Config)
    1546. 

  1546. </UL>
    1547. 

  1547. <P><STRONG><a name="[60]"></a>TIM_OC1PreloadConfig</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, stm32f4xx_tim.o(i.TIM_OC1PreloadConfig))
    1548. 

  1548. <BR>[Address Reference Count : 2]<UL><LI> main.o(i.ADC_Config)
    1549. 

  1549. <LI> main.o(i.Dshot_Config)
    1550. 

  1550. </UL>
    1551. 

  1551. <P><STRONG><a name="[64]"></a>TIM_OC2Init</STRONG> (Thumb, 120 bytes, Stack size 16 bytes, stm32f4xx_tim.o(i.TIM_OC2Init))
    1552. 

  1552. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = TIM_OC2Init
    1553. 

  1553. </UL>
    1554. 

  1554. <BR>[Address Reference Count : 1]<UL><LI> main.o(i.Dshot_Config)
    1555. 

  1555. </UL>
    1556. 

  1556. <P><STRONG><a name="[63]"></a>TIM_OC2PreloadConfig</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, stm32f4xx_tim.o(i.TIM_OC2PreloadConfig))
    1557. 

  1557. <BR>[Address Reference Count : 1]<UL><LI> main.o(i.Dshot_Config)
    1558. 

  1558. </UL>
    1559. 

  1559. <P><STRONG><a name="[91]"></a>TIM_SelectOutputTrigger</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, stm32f4xx_tim.o(i.TIM_SelectOutputTrigger))
    1560. 

  1560. <BR><BR>[Called By]<UL><LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_Mod_Config
    1561. 

  1561. <LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_TIM_Config
    1562. 

  1562. </UL>
    1563. 

  1563. 

  1564. <P><STRONG><a name="[8f]"></a>TIM_TimeBaseInit</STRONG> (Thumb, 96 bytes, Stack size 12 bytes, stm32f4xx_tim.o(i.TIM_TimeBaseInit))
    1565. 

  1565. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = TIM_TimeBaseInit
    1566. 

  1566. </UL>
    1567. 

  1567. <BR>[Called By]<UL><LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_Mod_Config
    1568. 

  1568. <LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Dshot_TIM_Config
    1569. 

  1569. <LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_TIM_Config
    1570. 

  1570. </UL>
    1571. 

  1571. 

  1572. <P><STRONG><a name="[40]"></a>UART5_IRQHandler</STRONG> (Thumb, 68 bytes, Stack size 16 bytes, it.o(i.UART5_IRQHandler))
    1573. 

  1573. <BR><BR>[Stack]<UL><LI>Max Depth = 112<LI>Call Chain = UART5_IRQHandler &rArr; AnaMotorData &rArr; __aeabi_dmul &rArr; _double_epilogue &rArr; _double_round
    1574. 

  1574. </UL>
    1575. 

  1575. <BR>[Calls]<UL><LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GetMotorData
    1576. 

  1576. <LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AnaMotorData
    1577. 

  1577. <LI><a href="#[ee]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_GetITStatus
    1578. 

  1578. <LI><a href="#[ef]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_ClearITPendingBit
    1579. 

  1579. </UL>
    1580. 

  1580. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    1581. 

  1581. </UL>
    1582. 

  1582. <P><STRONG><a name="[31]"></a>USART2_IRQHandler</STRONG> (Thumb, 72 bytes, Stack size 16 bytes, it.o(i.USART2_IRQHandler))
    1583. 

  1583. <BR><BR>[Stack]<UL><LI>Max Depth = 112<LI>Call Chain = USART2_IRQHandler &rArr; AnaMotorData &rArr; __aeabi_dmul &rArr; _double_epilogue &rArr; _double_round
    1584. 

  1584. </UL>
    1585. 

  1585. <BR>[Calls]<UL><LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GetMotorData
    1586. 

  1586. <LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AnaMotorData
    1587. 

  1587. <LI><a href="#[ee]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_GetITStatus
    1588. 

  1588. <LI><a href="#[ef]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_ClearITPendingBit
    1589. 

  1589. </UL>
    1590. 

  1590. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    1591. 

  1591. </UL>
    1592. 

  1592. <P><STRONG><a name="[32]"></a>USART3_IRQHandler</STRONG> (Thumb, 72 bytes, Stack size 16 bytes, it.o(i.USART3_IRQHandler))
    1593. 

  1593. <BR><BR>[Stack]<UL><LI>Max Depth = 112<LI>Call Chain = USART3_IRQHandler &rArr; AnaMotorData &rArr; __aeabi_dmul &rArr; _double_epilogue &rArr; _double_round
    1594. 

  1594. </UL>
    1595. 

  1595. <BR>[Calls]<UL><LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GetMotorData
    1596. 

  1596. <LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AnaMotorData
    1597. 

  1597. <LI><a href="#[ee]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_GetITStatus
    1598. 

  1598. <LI><a href="#[ef]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_ClearITPendingBit
    1599. 

  1599. </UL>
    1600. 

  1600. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    1601. 

  1601. </UL>
    1602. 

  1602. <P><STRONG><a name="[52]"></a>USART6_IRQHandler</STRONG> (Thumb, 72 bytes, Stack size 16 bytes, it.o(i.USART6_IRQHandler))
    1603. 

  1603. <BR><BR>[Stack]<UL><LI>Max Depth = 112<LI>Call Chain = USART6_IRQHandler &rArr; AnaMotorData &rArr; __aeabi_dmul &rArr; _double_epilogue &rArr; _double_round
    1604. 

  1604. </UL>
    1605. 

  1605. <BR>[Calls]<UL><LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GetMotorData
    1606. 

  1606. <LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AnaMotorData
    1607. 

  1607. <LI><a href="#[ee]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_GetITStatus
    1608. 

  1608. <LI><a href="#[ef]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_ClearITPendingBit
    1609. 

  1609. </UL>
    1610. 

  1610. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40_41xxx.o(RESET)
    1611. 

  1611. </UL>
    1612. 

  1612. <P><STRONG><a name="[ef]"></a>USART_ClearITPendingBit</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, stm32f4xx_usart.o(i.USART_ClearITPendingBit))
    1613. 

  1613. <BR><BR>[Called By]<UL><LI><a href="#[52]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART6_IRQHandler
    1614. 

  1614. <LI><a href="#[32]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART3_IRQHandler
    1615. 

  1615. <LI><a href="#[31]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART2_IRQHandler
    1616. 

  1616. <LI><a href="#[40]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART5_IRQHandler
    1617. 

  1617. </UL>
    1618. 

  1618. 

  1619. <P><STRONG><a name="[f7]"></a>USART_Cmd</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, stm32f4xx_usart.o(i.USART_Cmd))
    1620. 

  1620. <BR><BR>[Called By]<UL><LI><a href="#[f3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_MOD_Config
    1621. 

  1621. </UL>
    1622. 

  1622. 

  1623. <P><STRONG><a name="[f0]"></a>USART_Config</STRONG> (Thumb, 174 bytes, Stack size 16 bytes, main.o(i.USART_Config))
    1624. 

  1624. <BR><BR>[Stack]<UL><LI>Max Depth = 96<LI>Call Chain = USART_Config &rArr; USART_MOD_Config &rArr; USART_Init &rArr; RCC_GetClocksFreq
    1625. 

  1625. </UL>
    1626. 

  1626. <BR>[Calls]<UL><LI><a href="#[f2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_NVIC_Config
    1627. 

  1627. <LI><a href="#[f3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_MOD_Config
    1628. 

  1628. <LI><a href="#[f1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_GPIO_Config
    1629. 

  1629. </UL>
    1630. 

  1630. <BR>[Called By]<UL><LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1631. 

  1631. </UL>
    1632. 

  1632. 

  1633. <P><STRONG><a name="[f1]"></a>USART_GPIO_Config</STRONG> (Thumb, 64 bytes, Stack size 32 bytes, usart.o(i.USART_GPIO_Config))
    1634. 

  1634. <BR><BR>[Stack]<UL><LI>Max Depth = 52<LI>Call Chain = USART_GPIO_Config &rArr; GPIO_Init
    1635. 

  1635. </UL>
    1636. 

  1636. <BR>[Calls]<UL><LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_AHB1PeriphClockCmd
    1637. 

  1637. <LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_PinAFConfig
    1638. 

  1638. <LI><a href="#[86]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_Init
    1639. 

  1639. </UL>
    1640. 

  1640. <BR>[Called By]<UL><LI><a href="#[f0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_Config
    1641. 

  1641. </UL>
    1642. 

  1642. 

  1643. <P><STRONG><a name="[ee]"></a>USART_GetITStatus</STRONG> (Thumb, 62 bytes, Stack size 16 bytes, stm32f4xx_usart.o(i.USART_GetITStatus))
    1644. 

  1644. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = USART_GetITStatus
    1645. 

  1645. </UL>
    1646. 

  1646. <BR>[Called By]<UL><LI><a href="#[52]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART6_IRQHandler
    1647. 

  1647. <LI><a href="#[32]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART3_IRQHandler
    1648. 

  1648. <LI><a href="#[31]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART2_IRQHandler
    1649. 

  1649. <LI><a href="#[40]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART5_IRQHandler
    1650. 

  1650. </UL>
    1651. 

  1651. 

  1652. <P><STRONG><a name="[f6]"></a>USART_ITConfig</STRONG> (Thumb, 48 bytes, Stack size 8 bytes, stm32f4xx_usart.o(i.USART_ITConfig))
    1653. 

  1653. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = USART_ITConfig
    1654. 

  1654. </UL>
    1655. 

  1655. <BR>[Called By]<UL><LI><a href="#[f3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_MOD_Config
    1656. 

  1656. </UL>
    1657. 

  1657. 

  1658. <P><STRONG><a name="[f4]"></a>USART_Init</STRONG> (Thumb, 164 bytes, Stack size 32 bytes, stm32f4xx_usart.o(i.USART_Init))
    1659. 

  1659. <BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = USART_Init &rArr; RCC_GetClocksFreq
    1660. 

  1660. </UL>
    1661. 

  1661. <BR>[Calls]<UL><LI><a href="#[f5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_GetClocksFreq
    1662. 

  1662. </UL>
    1663. 

  1663. <BR>[Called By]<UL><LI><a href="#[f3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_MOD_Config
    1664. 

  1664. </UL>
    1665. 

  1665. 

  1666. <P><STRONG><a name="[f3]"></a>USART_MOD_Config</STRONG> (Thumb, 84 bytes, Stack size 32 bytes, usart.o(i.USART_MOD_Config))
    1667. 

  1667. <BR><BR>[Stack]<UL><LI>Max Depth = 80<LI>Call Chain = USART_MOD_Config &rArr; USART_Init &rArr; RCC_GetClocksFreq
    1668. 

  1668. </UL>
    1669. 

  1669. <BR>[Calls]<UL><LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_Init
    1670. 

  1670. <LI><a href="#[f6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_ITConfig
    1671. 

  1671. <LI><a href="#[f7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_Cmd
    1672. 

  1672. </UL>
    1673. 

  1673. <BR>[Called By]<UL><LI><a href="#[f0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_Config
    1674. 

  1674. </UL>
    1675. 

  1675. 

  1676. <P><STRONG><a name="[f2]"></a>USART_NVIC_Config</STRONG> (Thumb, 28 bytes, Stack size 8 bytes, usart.o(i.USART_NVIC_Config))
    1677. 

  1677. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = USART_NVIC_Config &rArr; NVIC_Init
    1678. 

  1678. </UL>
    1679. 

  1679. <BR>[Calls]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NVIC_Init
    1680. 

  1680. </UL>
    1681. 

  1681. <BR>[Called By]<UL><LI><a href="#[f0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_Config
    1682. 

  1682. </UL>
    1683. 

  1683. 

  1684. <P><STRONG><a name="[c5]"></a>USART_ReceiveData</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, stm32f4xx_usart.o(i.USART_ReceiveData))
    1685. 

  1685. <BR><BR>[Called By]<UL><LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GetMotorData
    1686. 

  1686. </UL>
    1687. 

  1687. 

  1688. <P><STRONG><a name="[f8]"></a>USBL_Config</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, main.o(i.USBL_Config))
    1689. 

  1689. <BR><BR>[Stack]<UL><LI>Max Depth = 44<LI>Call Chain = USBL_Config &rArr; GPIO_Config &rArr; GPIO_Init
    1690. 

  1690. </UL>
    1691. 

  1691. <BR>[Calls]<UL><LI><a href="#[c3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_Config
    1692. 

  1692. </UL>
    1693. 

  1693. <BR>[Called By]<UL><LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1694. 

  1694. </UL>
    1695. 

  1695. 

  1696. <P><STRONG><a name="[c6]"></a>__hardfp_log</STRONG> (Thumb, 872 bytes, Stack size 88 bytes, log.o(i.__hardfp_log))
    1697. 

  1697. <BR><BR>[Stack]<UL><LI>Max Depth = 200<LI>Call Chain = __hardfp_log &rArr; __kernel_poly &rArr; __aeabi_dmul &rArr; _double_epilogue &rArr; _double_round
    1698. 

  1698. </UL>
    1699. 

  1699. <BR>[Calls]<UL><LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_i2d
    1700. 

  1700. <LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dsub
    1701. 

  1701. <LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dmul
    1702. 

  1702. <LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
    1703. 

  1703. <LI><a href="#[6e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_drsub
    1704. 

  1704. <LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_ddiv
    1705. 

  1705. <LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_cdcmpeq
    1706. 

  1706. <LI><a href="#[fa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__set_errno
    1707. 

  1707. <LI><a href="#[fe]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__kernel_poly
    1708. 

  1708. <LI><a href="#[fb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__mathlib_dbl_invalid
    1709. 

  1709. <LI><a href="#[f9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__mathlib_dbl_infnan
    1710. 

  1710. <LI><a href="#[fc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__mathlib_dbl_divzero
    1711. 

  1711. </UL>
    1712. 

  1712. <BR>[Called By]<UL><LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_Temperature
    1713. 

  1713. </UL>
    1714. 

  1714. 

  1715. <P><STRONG><a name="[fe]"></a>__kernel_poly</STRONG> (Thumb, 248 bytes, Stack size 24 bytes, poly.o(i.__kernel_poly))
    1716. 

  1716. <BR><BR>[Stack]<UL><LI>Max Depth = 112<LI>Call Chain = __kernel_poly &rArr; __aeabi_dmul &rArr; _double_epilogue &rArr; _double_round
    1717. 

  1717. </UL>
    1718. 

  1718. <BR>[Calls]<UL><LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dmul
    1719. 

  1719. <LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
    1720. 

  1720. </UL>
    1721. 

  1721. <BR>[Called By]<UL><LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__hardfp_log
    1722. 

  1722. </UL>
    1723. 

  1723. 

  1724. <P><STRONG><a name="[fc]"></a>__mathlib_dbl_divzero</STRONG> (Thumb, 28 bytes, Stack size 8 bytes, dunder.o(i.__mathlib_dbl_divzero))
    1725. 

  1725. <BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = __mathlib_dbl_divzero &rArr; __aeabi_ddiv &rArr; _double_round
    1726. 

  1726. </UL>
    1727. 

  1727. <BR>[Calls]<UL><LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_ddiv
    1728. 

  1728. </UL>
    1729. 

  1729. <BR>[Called By]<UL><LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__hardfp_log
    1730. 

  1730. </UL>
    1731. 

  1731. 

  1732. <P><STRONG><a name="[f9]"></a>__mathlib_dbl_infnan</STRONG> (Thumb, 20 bytes, Stack size 8 bytes, dunder.o(i.__mathlib_dbl_infnan))
    1733. 

  1733. <BR><BR>[Stack]<UL><LI>Max Depth = 96<LI>Call Chain = __mathlib_dbl_infnan &rArr; __aeabi_dadd &rArr; _double_epilogue &rArr; _double_round
    1734. 

  1734. </UL>
    1735. 

  1735. <BR>[Calls]<UL><LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
    1736. 

  1736. </UL>
    1737. 

  1737. <BR>[Called By]<UL><LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__hardfp_log
    1738. 

  1738. </UL>
    1739. 

  1739. 

  1740. <P><STRONG><a name="[fb]"></a>__mathlib_dbl_invalid</STRONG> (Thumb, 24 bytes, Stack size 8 bytes, dunder.o(i.__mathlib_dbl_invalid))
    1741. 

  1741. <BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = __mathlib_dbl_invalid &rArr; __aeabi_ddiv &rArr; _double_round
    1742. 

  1742. </UL>
    1743. 

  1743. <BR>[Calls]<UL><LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_ddiv
    1744. 

  1744. </UL>
    1745. 

  1745. <BR>[Called By]<UL><LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__hardfp_log
    1746. 

  1746. </UL>
    1747. 

  1747. 

  1748. <P><STRONG><a name="[112]"></a>__scatterload_copy</STRONG> (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_copy), UNUSED)
    1749. 

  1749. 

  1750. <P><STRONG><a name="[113]"></a>__scatterload_null</STRONG> (Thumb, 2 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_null), UNUSED)
    1751. 

  1751. 

  1752. <P><STRONG><a name="[114]"></a>__scatterload_zeroinit</STRONG> (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_zeroinit), UNUSED)
    1753. 

  1753. 

  1754. <P><STRONG><a name="[fa]"></a>__set_errno</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, errno.o(i.__set_errno))
    1755. 

  1755. <BR><BR>[Called By]<UL><LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__hardfp_log
    1756. 

  1756. </UL>
    1757. 

  1757. 

  1758. <P><STRONG><a name="[104]"></a>add_checksum_and_telemetry</STRONG> (Thumb, 38 bytes, Stack size 0 bytes, dshot.o(i.add_checksum_and_telemetry))
    1759. 

  1759. <BR><BR>[Called By]<UL><LI><a href="#[ec]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pwmWriteDigital
    1760. 

  1760. </UL>
    1761. 

  1761. 

  1762. <P><STRONG><a name="[ff]"></a>cycleCounterInit</STRONG> (Thumb, 62 bytes, Stack size 24 bytes, delay.o(i.cycleCounterInit))
    1763. 

  1763. <BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = cycleCounterInit &rArr; RCC_GetClocksFreq
    1764. 

  1764. </UL>
    1765. 

  1765. <BR>[Calls]<UL><LI><a href="#[f5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_GetClocksFreq
    1766. 

  1766. </UL>
    1767. 

  1767. <BR>[Called By]<UL><LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1768. 

  1768. </UL>
    1769. 

  1769. 

  1770. <P><STRONG><a name="[100]"></a>delay_ms</STRONG> (Thumb, 32 bytes, Stack size 12 bytes, delay.o(i.delay_ms))
    1771. 

  1771. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = delay_ms &rArr; Micros
    1772. 

  1772. </UL>
    1773. 

  1773. <BR>[Calls]<UL><LI><a href="#[101]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Micros
    1774. 

  1774. </UL>
    1775. 

  1775. <BR>[Called By]<UL><LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1776. 

  1776. </UL>
    1777. 

  1777. 

  1778. <P><STRONG><a name="[96]"></a>get_crc8</STRONG> (Thumb, 32 bytes, Stack size 16 bytes, main.o(i.get_crc8))
    1779. 

  1779. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = get_crc8
    1780. 

  1780. </UL>
    1781. 

  1781. <BR>[Calls]<UL><LI><a href="#[102]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;update_crc8
    1782. 

  1782. </UL>
    1783. 

  1783. <BR>[Called By]<UL><LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AnaMotorData
    1784. 

  1784. </UL>
    1785. 

  1785. 

  1786. <P><STRONG><a name="[5d]"></a>main</STRONG> (Thumb, 96 bytes, Stack size 0 bytes, main.o(i.main))
    1787. 

  1787. <BR><BR>[Stack]<UL><LI>Max Depth = 136<LI>Call Chain = main &rArr; Motor_Stall_check &rArr; Stall_check &rArr; __aeabi_dsub &rArr; __aeabi_dadd &rArr; _double_epilogue &rArr; _double_round
    1788. 

  1788. </UL>
    1789. 

  1789. <BR>[Calls]<UL><LI><a href="#[100]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;delay_ms
    1790. 

  1790. <LI><a href="#[ff]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;cycleCounterInit
    1791. 

  1791. <LI><a href="#[103]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NVIC_PriorityGroupConfig
    1792. 

  1792. <LI><a href="#[c7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IWDG_Config
    1793. 

  1793. <LI><a href="#[f8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USBL_Config
    1794. 

  1794. <LI><a href="#[f0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_Config
    1795. 

  1795. <LI><a href="#[e5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_500ms_Task
    1796. 

  1796. <LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_20ms_Task
    1797. 

  1797. <LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_10ms_Task
    1798. 

  1798. <LI><a href="#[e1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_100ms_Task
    1799. 

  1799. <LI><a href="#[d1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Other_Task
    1800. 

  1800. <LI><a href="#[cf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Motor_Stall_check
    1801. 

  1801. <LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Motor_AD_correct
    1802. 

  1802. <LI><a href="#[cd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Light_Config
    1803. 

  1803. <LI><a href="#[cc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LED_Config
    1804. 

  1804. <LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Flash_ReadInf
    1805. 

  1805. <LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Dshot_Config
    1806. 

  1806. <LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_Config
    1807. 

  1807. <LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;All_motor_Config
    1808. 

  1808. <LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_Config
    1809. 

  1809. </UL>
    1810. 

  1810. <BR>[Address Reference Count : 1]<UL><LI> entry9a.o(.ARM.Collect$$$$0000000B)
    1811. 

  1811. </UL>
    1812. 

  1812. <P><STRONG><a name="[ec]"></a>pwmWriteDigital</STRONG> (Thumb, 228 bytes, Stack size 16 bytes, dshot.o(i.pwmWriteDigital))
    1813. 

  1813. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = pwmWriteDigital
    1814. 

  1814. </UL>
    1815. 

  1815. <BR>[Calls]<UL><LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_Cmd
    1816. 

  1816. <LI><a href="#[104]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;add_checksum_and_telemetry
    1817. 

  1817. </UL>
    1818. 

  1818. <BR>[Called By]<UL><LI><a href="#[24]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM1_UP_TIM10_IRQHandler
    1819. 

  1819. </UL>
    1820. 

  1820. 

  1821. <P><STRONG><a name="[102]"></a>update_crc8</STRONG> (Thumb, 30 bytes, Stack size 0 bytes, main.o(i.update_crc8))
    1822. 

  1822. <BR><BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;get_crc8
    1823. 

  1823. </UL>
    1824. 

  1824. <P>
    1825. 

  1825. <H3>
    1826. 

  1826. Local Symbols
    1827. 

  1827. </H3>
    1828. 

  1828. <P><STRONG><a name="[e9]"></a>SetSysClock</STRONG> (Thumb, 162 bytes, Stack size 12 bytes, system_stm32f4xx.o(i.SetSysClock))
    1829. 

  1829. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = SetSysClock
    1830. 

  1830. </UL>
    1831. 

  1831. <BR>[Called By]<UL><LI><a href="#[5e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemInit
    1832. 

  1832. </UL>
    1833. 

  1833. <P>
    1834. 

  1834. <H3>
    1835. 

  1835. Undefined Global Symbols
    1836. 

  1836. </H3><HR></body></html>
    1837.