stm32f4xx_sdio.h 22 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_sdio.h
  4. * @author MCD Application Team
  5. * @version V1.8.0
  6. * @date 04-November-2016
  7. * @brief This file contains all the functions prototypes for the SDIO firmware
  8. * library.
  9. ******************************************************************************
  10. * @attention
  11. *
  12. * <h2><center>&copy; COPYRIGHT 2016 STMicroelectronics</center></h2>
  13. *
  14. * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  15. * You may not use this file except in compliance with the License.
  16. * You may obtain a copy of the License at:
  17. *
  18. * http://www.st.com/software_license_agreement_liberty_v2
  19. *
  20. * Unless required by applicable law or agreed to in writing, software
  21. * distributed under the License is distributed on an "AS IS" BASIS,
  22. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  23. * See the License for the specific language governing permissions and
  24. * limitations under the License.
  25. *
  26. ******************************************************************************
  27. */
  28. /* Define to prevent recursive inclusion -------------------------------------*/
  29. #ifndef __STM32F4xx_SDIO_H
  30. #define __STM32F4xx_SDIO_H
  31. #ifdef __cplusplus
  32. extern "C" {
  33. #endif
  34. /* Includes ------------------------------------------------------------------*/
  35. #include "stm32f4xx.h"
  36. /** @addtogroup STM32F4xx_StdPeriph_Driver
  37. * @{
  38. */
  39. /** @addtogroup SDIO
  40. * @{
  41. */
  42. /* Exported types ------------------------------------------------------------*/
  43. typedef struct
  44. {
  45. uint32_t SDIO_ClockEdge; /*!< Specifies the clock transition on which the bit capture is made.
  46. This parameter can be a value of @ref SDIO_Clock_Edge */
  47. uint32_t SDIO_ClockBypass; /*!< Specifies whether the SDIO Clock divider bypass is
  48. enabled or disabled.
  49. This parameter can be a value of @ref SDIO_Clock_Bypass */
  50. uint32_t SDIO_ClockPowerSave; /*!< Specifies whether SDIO Clock output is enabled or
  51. disabled when the bus is idle.
  52. This parameter can be a value of @ref SDIO_Clock_Power_Save */
  53. uint32_t SDIO_BusWide; /*!< Specifies the SDIO bus width.
  54. This parameter can be a value of @ref SDIO_Bus_Wide */
  55. uint32_t SDIO_HardwareFlowControl; /*!< Specifies whether the SDIO hardware flow control is enabled or disabled.
  56. This parameter can be a value of @ref SDIO_Hardware_Flow_Control */
  57. uint8_t SDIO_ClockDiv; /*!< Specifies the clock frequency of the SDIO controller.
  58. This parameter can be a value between 0x00 and 0xFF. */
  59. } SDIO_InitTypeDef;
  60. typedef struct
  61. {
  62. uint32_t SDIO_Argument; /*!< Specifies the SDIO command argument which is sent
  63. to a card as part of a command message. If a command
  64. contains an argument, it must be loaded into this register
  65. before writing the command to the command register */
  66. uint32_t SDIO_CmdIndex; /*!< Specifies the SDIO command index. It must be lower than 0x40. */
  67. uint32_t SDIO_Response; /*!< Specifies the SDIO response type.
  68. This parameter can be a value of @ref SDIO_Response_Type */
  69. uint32_t SDIO_Wait; /*!< Specifies whether SDIO wait for interrupt request is enabled or disabled.
  70. This parameter can be a value of @ref SDIO_Wait_Interrupt_State */
  71. uint32_t SDIO_CPSM; /*!< Specifies whether SDIO Command path state machine (CPSM)
  72. is enabled or disabled.
  73. This parameter can be a value of @ref SDIO_CPSM_State */
  74. } SDIO_CmdInitTypeDef;
  75. typedef struct
  76. {
  77. uint32_t SDIO_DataTimeOut; /*!< Specifies the data timeout period in card bus clock periods. */
  78. uint32_t SDIO_DataLength; /*!< Specifies the number of data bytes to be transferred. */
  79. uint32_t SDIO_DataBlockSize; /*!< Specifies the data block size for block transfer.
  80. This parameter can be a value of @ref SDIO_Data_Block_Size */
  81. uint32_t SDIO_TransferDir; /*!< Specifies the data transfer direction, whether the transfer
  82. is a read or write.
  83. This parameter can be a value of @ref SDIO_Transfer_Direction */
  84. uint32_t SDIO_TransferMode; /*!< Specifies whether data transfer is in stream or block mode.
  85. This parameter can be a value of @ref SDIO_Transfer_Type */
  86. uint32_t SDIO_DPSM; /*!< Specifies whether SDIO Data path state machine (DPSM)
  87. is enabled or disabled.
  88. This parameter can be a value of @ref SDIO_DPSM_State */
  89. } SDIO_DataInitTypeDef;
  90. /* Exported constants --------------------------------------------------------*/
  91. /** @defgroup SDIO_Exported_Constants
  92. * @{
  93. */
  94. /** @defgroup SDIO_Clock_Edge
  95. * @{
  96. */
  97. #define SDIO_ClockEdge_Rising ((uint32_t)0x00000000)
  98. #define SDIO_ClockEdge_Falling ((uint32_t)0x00002000)
  99. #define IS_SDIO_CLOCK_EDGE(EDGE) (((EDGE) == SDIO_ClockEdge_Rising) || \
  100. ((EDGE) == SDIO_ClockEdge_Falling))
  101. /**
  102. * @}
  103. */
  104. /** @defgroup SDIO_Clock_Bypass
  105. * @{
  106. */
  107. #define SDIO_ClockBypass_Disable ((uint32_t)0x00000000)
  108. #define SDIO_ClockBypass_Enable ((uint32_t)0x00000400)
  109. #define IS_SDIO_CLOCK_BYPASS(BYPASS) (((BYPASS) == SDIO_ClockBypass_Disable) || \
  110. ((BYPASS) == SDIO_ClockBypass_Enable))
  111. /**
  112. * @}
  113. */
  114. /** @defgroup SDIO_Clock_Power_Save
  115. * @{
  116. */
  117. #define SDIO_ClockPowerSave_Disable ((uint32_t)0x00000000)
  118. #define SDIO_ClockPowerSave_Enable ((uint32_t)0x00000200)
  119. #define IS_SDIO_CLOCK_POWER_SAVE(SAVE) (((SAVE) == SDIO_ClockPowerSave_Disable) || \
  120. ((SAVE) == SDIO_ClockPowerSave_Enable))
  121. /**
  122. * @}
  123. */
  124. /** @defgroup SDIO_Bus_Wide
  125. * @{
  126. */
  127. #define SDIO_BusWide_1b ((uint32_t)0x00000000)
  128. #define SDIO_BusWide_4b ((uint32_t)0x00000800)
  129. #define SDIO_BusWide_8b ((uint32_t)0x00001000)
  130. #define IS_SDIO_BUS_WIDE(WIDE) (((WIDE) == SDIO_BusWide_1b) || ((WIDE) == SDIO_BusWide_4b) || \
  131. ((WIDE) == SDIO_BusWide_8b))
  132. /**
  133. * @}
  134. */
  135. /** @defgroup SDIO_Hardware_Flow_Control
  136. * @{
  137. */
  138. #define SDIO_HardwareFlowControl_Disable ((uint32_t)0x00000000)
  139. #define SDIO_HardwareFlowControl_Enable ((uint32_t)0x00004000)
  140. #define IS_SDIO_HARDWARE_FLOW_CONTROL(CONTROL) (((CONTROL) == SDIO_HardwareFlowControl_Disable) || \
  141. ((CONTROL) == SDIO_HardwareFlowControl_Enable))
  142. /**
  143. * @}
  144. */
  145. /** @defgroup SDIO_Power_State
  146. * @{
  147. */
  148. #define SDIO_PowerState_OFF ((uint32_t)0x00000000)
  149. #define SDIO_PowerState_ON ((uint32_t)0x00000003)
  150. #define IS_SDIO_POWER_STATE(STATE) (((STATE) == SDIO_PowerState_OFF) || ((STATE) == SDIO_PowerState_ON))
  151. /**
  152. * @}
  153. */
  154. /** @defgroup SDIO_Interrupt_sources
  155. * @{
  156. */
  157. #define SDIO_IT_CCRCFAIL ((uint32_t)0x00000001)
  158. #define SDIO_IT_DCRCFAIL ((uint32_t)0x00000002)
  159. #define SDIO_IT_CTIMEOUT ((uint32_t)0x00000004)
  160. #define SDIO_IT_DTIMEOUT ((uint32_t)0x00000008)
  161. #define SDIO_IT_TXUNDERR ((uint32_t)0x00000010)
  162. #define SDIO_IT_RXOVERR ((uint32_t)0x00000020)
  163. #define SDIO_IT_CMDREND ((uint32_t)0x00000040)
  164. #define SDIO_IT_CMDSENT ((uint32_t)0x00000080)
  165. #define SDIO_IT_DATAEND ((uint32_t)0x00000100)
  166. #define SDIO_IT_STBITERR ((uint32_t)0x00000200)
  167. #define SDIO_IT_DBCKEND ((uint32_t)0x00000400)
  168. #define SDIO_IT_CMDACT ((uint32_t)0x00000800)
  169. #define SDIO_IT_TXACT ((uint32_t)0x00001000)
  170. #define SDIO_IT_RXACT ((uint32_t)0x00002000)
  171. #define SDIO_IT_TXFIFOHE ((uint32_t)0x00004000)
  172. #define SDIO_IT_RXFIFOHF ((uint32_t)0x00008000)
  173. #define SDIO_IT_TXFIFOF ((uint32_t)0x00010000)
  174. #define SDIO_IT_RXFIFOF ((uint32_t)0x00020000)
  175. #define SDIO_IT_TXFIFOE ((uint32_t)0x00040000)
  176. #define SDIO_IT_RXFIFOE ((uint32_t)0x00080000)
  177. #define SDIO_IT_TXDAVL ((uint32_t)0x00100000)
  178. #define SDIO_IT_RXDAVL ((uint32_t)0x00200000)
  179. #define SDIO_IT_SDIOIT ((uint32_t)0x00400000)
  180. #define SDIO_IT_CEATAEND ((uint32_t)0x00800000)
  181. #define IS_SDIO_IT(IT) ((((IT) & (uint32_t)0xFF000000) == 0x00) && ((IT) != (uint32_t)0x00))
  182. /**
  183. * @}
  184. */
  185. /** @defgroup SDIO_Command_Index
  186. * @{
  187. */
  188. #define IS_SDIO_CMD_INDEX(INDEX) ((INDEX) < 0x40)
  189. /**
  190. * @}
  191. */
  192. /** @defgroup SDIO_Response_Type
  193. * @{
  194. */
  195. #define SDIO_Response_No ((uint32_t)0x00000000)
  196. #define SDIO_Response_Short ((uint32_t)0x00000040)
  197. #define SDIO_Response_Long ((uint32_t)0x000000C0)
  198. #define IS_SDIO_RESPONSE(RESPONSE) (((RESPONSE) == SDIO_Response_No) || \
  199. ((RESPONSE) == SDIO_Response_Short) || \
  200. ((RESPONSE) == SDIO_Response_Long))
  201. /**
  202. * @}
  203. */
  204. /** @defgroup SDIO_Wait_Interrupt_State
  205. * @{
  206. */
  207. #define SDIO_Wait_No ((uint32_t)0x00000000) /*!< SDIO No Wait, TimeOut is enabled */
  208. #define SDIO_Wait_IT ((uint32_t)0x00000100) /*!< SDIO Wait Interrupt Request */
  209. #define SDIO_Wait_Pend ((uint32_t)0x00000200) /*!< SDIO Wait End of transfer */
  210. #define IS_SDIO_WAIT(WAIT) (((WAIT) == SDIO_Wait_No) || ((WAIT) == SDIO_Wait_IT) || \
  211. ((WAIT) == SDIO_Wait_Pend))
  212. /**
  213. * @}
  214. */
  215. /** @defgroup SDIO_CPSM_State
  216. * @{
  217. */
  218. #define SDIO_CPSM_Disable ((uint32_t)0x00000000)
  219. #define SDIO_CPSM_Enable ((uint32_t)0x00000400)
  220. #define IS_SDIO_CPSM(CPSM) (((CPSM) == SDIO_CPSM_Enable) || ((CPSM) == SDIO_CPSM_Disable))
  221. /**
  222. * @}
  223. */
  224. /** @defgroup SDIO_Response_Registers
  225. * @{
  226. */
  227. #define SDIO_RESP1 ((uint32_t)0x00000000)
  228. #define SDIO_RESP2 ((uint32_t)0x00000004)
  229. #define SDIO_RESP3 ((uint32_t)0x00000008)
  230. #define SDIO_RESP4 ((uint32_t)0x0000000C)
  231. #define IS_SDIO_RESP(RESP) (((RESP) == SDIO_RESP1) || ((RESP) == SDIO_RESP2) || \
  232. ((RESP) == SDIO_RESP3) || ((RESP) == SDIO_RESP4))
  233. /**
  234. * @}
  235. */
  236. /** @defgroup SDIO_Data_Length
  237. * @{
  238. */
  239. #define IS_SDIO_DATA_LENGTH(LENGTH) ((LENGTH) <= 0x01FFFFFF)
  240. /**
  241. * @}
  242. */
  243. /** @defgroup SDIO_Data_Block_Size
  244. * @{
  245. */
  246. #define SDIO_DataBlockSize_1b ((uint32_t)0x00000000)
  247. #define SDIO_DataBlockSize_2b ((uint32_t)0x00000010)
  248. #define SDIO_DataBlockSize_4b ((uint32_t)0x00000020)
  249. #define SDIO_DataBlockSize_8b ((uint32_t)0x00000030)
  250. #define SDIO_DataBlockSize_16b ((uint32_t)0x00000040)
  251. #define SDIO_DataBlockSize_32b ((uint32_t)0x00000050)
  252. #define SDIO_DataBlockSize_64b ((uint32_t)0x00000060)
  253. #define SDIO_DataBlockSize_128b ((uint32_t)0x00000070)
  254. #define SDIO_DataBlockSize_256b ((uint32_t)0x00000080)
  255. #define SDIO_DataBlockSize_512b ((uint32_t)0x00000090)
  256. #define SDIO_DataBlockSize_1024b ((uint32_t)0x000000A0)
  257. #define SDIO_DataBlockSize_2048b ((uint32_t)0x000000B0)
  258. #define SDIO_DataBlockSize_4096b ((uint32_t)0x000000C0)
  259. #define SDIO_DataBlockSize_8192b ((uint32_t)0x000000D0)
  260. #define SDIO_DataBlockSize_16384b ((uint32_t)0x000000E0)
  261. #define IS_SDIO_BLOCK_SIZE(SIZE) (((SIZE) == SDIO_DataBlockSize_1b) || \
  262. ((SIZE) == SDIO_DataBlockSize_2b) || \
  263. ((SIZE) == SDIO_DataBlockSize_4b) || \
  264. ((SIZE) == SDIO_DataBlockSize_8b) || \
  265. ((SIZE) == SDIO_DataBlockSize_16b) || \
  266. ((SIZE) == SDIO_DataBlockSize_32b) || \
  267. ((SIZE) == SDIO_DataBlockSize_64b) || \
  268. ((SIZE) == SDIO_DataBlockSize_128b) || \
  269. ((SIZE) == SDIO_DataBlockSize_256b) || \
  270. ((SIZE) == SDIO_DataBlockSize_512b) || \
  271. ((SIZE) == SDIO_DataBlockSize_1024b) || \
  272. ((SIZE) == SDIO_DataBlockSize_2048b) || \
  273. ((SIZE) == SDIO_DataBlockSize_4096b) || \
  274. ((SIZE) == SDIO_DataBlockSize_8192b) || \
  275. ((SIZE) == SDIO_DataBlockSize_16384b))
  276. /**
  277. * @}
  278. */
  279. /** @defgroup SDIO_Transfer_Direction
  280. * @{
  281. */
  282. #define SDIO_TransferDir_ToCard ((uint32_t)0x00000000)
  283. #define SDIO_TransferDir_ToSDIO ((uint32_t)0x00000002)
  284. #define IS_SDIO_TRANSFER_DIR(DIR) (((DIR) == SDIO_TransferDir_ToCard) || \
  285. ((DIR) == SDIO_TransferDir_ToSDIO))
  286. /**
  287. * @}
  288. */
  289. /** @defgroup SDIO_Transfer_Type
  290. * @{
  291. */
  292. #define SDIO_TransferMode_Block ((uint32_t)0x00000000)
  293. #define SDIO_TransferMode_Stream ((uint32_t)0x00000004)
  294. #define IS_SDIO_TRANSFER_MODE(MODE) (((MODE) == SDIO_TransferMode_Stream) || \
  295. ((MODE) == SDIO_TransferMode_Block))
  296. /**
  297. * @}
  298. */
  299. /** @defgroup SDIO_DPSM_State
  300. * @{
  301. */
  302. #define SDIO_DPSM_Disable ((uint32_t)0x00000000)
  303. #define SDIO_DPSM_Enable ((uint32_t)0x00000001)
  304. #define IS_SDIO_DPSM(DPSM) (((DPSM) == SDIO_DPSM_Enable) || ((DPSM) == SDIO_DPSM_Disable))
  305. /**
  306. * @}
  307. */
  308. /** @defgroup SDIO_Flags
  309. * @{
  310. */
  311. #define SDIO_FLAG_CCRCFAIL ((uint32_t)0x00000001)
  312. #define SDIO_FLAG_DCRCFAIL ((uint32_t)0x00000002)
  313. #define SDIO_FLAG_CTIMEOUT ((uint32_t)0x00000004)
  314. #define SDIO_FLAG_DTIMEOUT ((uint32_t)0x00000008)
  315. #define SDIO_FLAG_TXUNDERR ((uint32_t)0x00000010)
  316. #define SDIO_FLAG_RXOVERR ((uint32_t)0x00000020)
  317. #define SDIO_FLAG_CMDREND ((uint32_t)0x00000040)
  318. #define SDIO_FLAG_CMDSENT ((uint32_t)0x00000080)
  319. #define SDIO_FLAG_DATAEND ((uint32_t)0x00000100)
  320. #define SDIO_FLAG_STBITERR ((uint32_t)0x00000200)
  321. #define SDIO_FLAG_DBCKEND ((uint32_t)0x00000400)
  322. #define SDIO_FLAG_CMDACT ((uint32_t)0x00000800)
  323. #define SDIO_FLAG_TXACT ((uint32_t)0x00001000)
  324. #define SDIO_FLAG_RXACT ((uint32_t)0x00002000)
  325. #define SDIO_FLAG_TXFIFOHE ((uint32_t)0x00004000)
  326. #define SDIO_FLAG_RXFIFOHF ((uint32_t)0x00008000)
  327. #define SDIO_FLAG_TXFIFOF ((uint32_t)0x00010000)
  328. #define SDIO_FLAG_RXFIFOF ((uint32_t)0x00020000)
  329. #define SDIO_FLAG_TXFIFOE ((uint32_t)0x00040000)
  330. #define SDIO_FLAG_RXFIFOE ((uint32_t)0x00080000)
  331. #define SDIO_FLAG_TXDAVL ((uint32_t)0x00100000)
  332. #define SDIO_FLAG_RXDAVL ((uint32_t)0x00200000)
  333. #define SDIO_FLAG_SDIOIT ((uint32_t)0x00400000)
  334. #define SDIO_FLAG_CEATAEND ((uint32_t)0x00800000)
  335. #define IS_SDIO_FLAG(FLAG) (((FLAG) == SDIO_FLAG_CCRCFAIL) || \
  336. ((FLAG) == SDIO_FLAG_DCRCFAIL) || \
  337. ((FLAG) == SDIO_FLAG_CTIMEOUT) || \
  338. ((FLAG) == SDIO_FLAG_DTIMEOUT) || \
  339. ((FLAG) == SDIO_FLAG_TXUNDERR) || \
  340. ((FLAG) == SDIO_FLAG_RXOVERR) || \
  341. ((FLAG) == SDIO_FLAG_CMDREND) || \
  342. ((FLAG) == SDIO_FLAG_CMDSENT) || \
  343. ((FLAG) == SDIO_FLAG_DATAEND) || \
  344. ((FLAG) == SDIO_FLAG_STBITERR) || \
  345. ((FLAG) == SDIO_FLAG_DBCKEND) || \
  346. ((FLAG) == SDIO_FLAG_CMDACT) || \
  347. ((FLAG) == SDIO_FLAG_TXACT) || \
  348. ((FLAG) == SDIO_FLAG_RXACT) || \
  349. ((FLAG) == SDIO_FLAG_TXFIFOHE) || \
  350. ((FLAG) == SDIO_FLAG_RXFIFOHF) || \
  351. ((FLAG) == SDIO_FLAG_TXFIFOF) || \
  352. ((FLAG) == SDIO_FLAG_RXFIFOF) || \
  353. ((FLAG) == SDIO_FLAG_TXFIFOE) || \
  354. ((FLAG) == SDIO_FLAG_RXFIFOE) || \
  355. ((FLAG) == SDIO_FLAG_TXDAVL) || \
  356. ((FLAG) == SDIO_FLAG_RXDAVL) || \
  357. ((FLAG) == SDIO_FLAG_SDIOIT) || \
  358. ((FLAG) == SDIO_FLAG_CEATAEND))
  359. #define IS_SDIO_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFF3FF800) == 0x00) && ((FLAG) != (uint32_t)0x00))
  360. #define IS_SDIO_GET_IT(IT) (((IT) == SDIO_IT_CCRCFAIL) || \
  361. ((IT) == SDIO_IT_DCRCFAIL) || \
  362. ((IT) == SDIO_IT_CTIMEOUT) || \
  363. ((IT) == SDIO_IT_DTIMEOUT) || \
  364. ((IT) == SDIO_IT_TXUNDERR) || \
  365. ((IT) == SDIO_IT_RXOVERR) || \
  366. ((IT) == SDIO_IT_CMDREND) || \
  367. ((IT) == SDIO_IT_CMDSENT) || \
  368. ((IT) == SDIO_IT_DATAEND) || \
  369. ((IT) == SDIO_IT_STBITERR) || \
  370. ((IT) == SDIO_IT_DBCKEND) || \
  371. ((IT) == SDIO_IT_CMDACT) || \
  372. ((IT) == SDIO_IT_TXACT) || \
  373. ((IT) == SDIO_IT_RXACT) || \
  374. ((IT) == SDIO_IT_TXFIFOHE) || \
  375. ((IT) == SDIO_IT_RXFIFOHF) || \
  376. ((IT) == SDIO_IT_TXFIFOF) || \
  377. ((IT) == SDIO_IT_RXFIFOF) || \
  378. ((IT) == SDIO_IT_TXFIFOE) || \
  379. ((IT) == SDIO_IT_RXFIFOE) || \
  380. ((IT) == SDIO_IT_TXDAVL) || \
  381. ((IT) == SDIO_IT_RXDAVL) || \
  382. ((IT) == SDIO_IT_SDIOIT) || \
  383. ((IT) == SDIO_IT_CEATAEND))
  384. #define IS_SDIO_CLEAR_IT(IT) ((((IT) & (uint32_t)0xFF3FF800) == 0x00) && ((IT) != (uint32_t)0x00))
  385. /**
  386. * @}
  387. */
  388. /** @defgroup SDIO_Read_Wait_Mode
  389. * @{
  390. */
  391. #define SDIO_ReadWaitMode_DATA2 ((uint32_t)0x00000000)
  392. #define SDIO_ReadWaitMode_CLK ((uint32_t)0x00000001)
  393. #define IS_SDIO_READWAIT_MODE(MODE) (((MODE) == SDIO_ReadWaitMode_CLK) || \
  394. ((MODE) == SDIO_ReadWaitMode_DATA2))
  395. /**
  396. * @}
  397. */
  398. /**
  399. * @}
  400. */
  401. /* Exported macro ------------------------------------------------------------*/
  402. /* Exported functions --------------------------------------------------------*/
  403. /* Function used to set the SDIO configuration to the default reset state ****/
  404. void SDIO_DeInit(void);
  405. /* Initialization and Configuration functions *********************************/
  406. void SDIO_Init(SDIO_InitTypeDef* SDIO_InitStruct);
  407. void SDIO_StructInit(SDIO_InitTypeDef* SDIO_InitStruct);
  408. void SDIO_ClockCmd(FunctionalState NewState);
  409. void SDIO_SetPowerState(uint32_t SDIO_PowerState);
  410. uint32_t SDIO_GetPowerState(void);
  411. /* Command path state machine (CPSM) management functions *********************/
  412. void SDIO_SendCommand(SDIO_CmdInitTypeDef *SDIO_CmdInitStruct);
  413. void SDIO_CmdStructInit(SDIO_CmdInitTypeDef* SDIO_CmdInitStruct);
  414. uint8_t SDIO_GetCommandResponse(void);
  415. uint32_t SDIO_GetResponse(uint32_t SDIO_RESP);
  416. /* Data path state machine (DPSM) management functions ************************/
  417. void SDIO_DataConfig(SDIO_DataInitTypeDef* SDIO_DataInitStruct);
  418. void SDIO_DataStructInit(SDIO_DataInitTypeDef* SDIO_DataInitStruct);
  419. uint32_t SDIO_GetDataCounter(void);
  420. uint32_t SDIO_ReadData(void);
  421. void SDIO_WriteData(uint32_t Data);
  422. uint32_t SDIO_GetFIFOCount(void);
  423. /* SDIO IO Cards mode management functions ************************************/
  424. void SDIO_StartSDIOReadWait(FunctionalState NewState);
  425. void SDIO_StopSDIOReadWait(FunctionalState NewState);
  426. void SDIO_SetSDIOReadWaitMode(uint32_t SDIO_ReadWaitMode);
  427. void SDIO_SetSDIOOperation(FunctionalState NewState);
  428. void SDIO_SendSDIOSuspendCmd(FunctionalState NewState);
  429. /* CE-ATA mode management functions *******************************************/
  430. void SDIO_CommandCompletionCmd(FunctionalState NewState);
  431. void SDIO_CEATAITCmd(FunctionalState NewState);
  432. void SDIO_SendCEATACmd(FunctionalState NewState);
  433. /* DMA transfers management functions *****************************************/
  434. void SDIO_DMACmd(FunctionalState NewState);
  435. /* Interrupts and flags management functions **********************************/
  436. void SDIO_ITConfig(uint32_t SDIO_IT, FunctionalState NewState);
  437. FlagStatus SDIO_GetFlagStatus(uint32_t SDIO_FLAG);
  438. void SDIO_ClearFlag(uint32_t SDIO_FLAG);
  439. ITStatus SDIO_GetITStatus(uint32_t SDIO_IT);
  440. void SDIO_ClearITPendingBit(uint32_t SDIO_IT);
  441. #ifdef __cplusplus
  442. }
  443. #endif
  444. #endif /* __STM32F4xx_SDIO_H */
  445. /**
  446. * @}
  447. */
  448. /**
  449. * @}
  450. */
  451. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/